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//! and ouput operands in various instructions.
</span><span class="kw">use </span><span class="kw">crate</span>::Reg64;
<span class="attr">#[derive(Clone, Copy)]
</span><span class="kw">pub</span>(<span class="kw">crate</span>) <span class="kw">enum </span>AddrMode {
<span class="doccomment">/// An indirect memory operand, eg `mov [rax], rcx`.
</span>Indirect,
<span class="doccomment">/// An indirect memory operand with additional displacement, eg `mov [rax + 0x10], rcx`.
</span>IndirectDisp,
<span class="doccomment">/// An indirect memory operand in the form base + index, eg `mov [rax + rcx], rdx`.
</span>IndirectBaseIndex,
}
<span class="doccomment">/// Trait to interact with memory operands.
</span><span class="kw">pub</span>(<span class="kw">crate</span>) <span class="kw">trait </span>Mem {
<span class="doccomment">/// Get the addressing mode [`AddrMode`] of the memory operand.
</span><span class="kw">fn </span>mode(<span class="kw-2">&</span><span class="self">self</span>) -> AddrMode;
<span class="doccomment">/// Get the base address register of the memory operand.
</span><span class="kw">fn </span>base(<span class="kw-2">&</span><span class="self">self</span>) -> Reg64;
<span class="doccomment">/// Get the index register of the memory operand.
</span><span class="kw">fn </span>index(<span class="kw-2">&</span><span class="self">self</span>) -> Reg64;
<span class="doccomment">/// Get the displacement of the memory operand.
</span><span class="kw">fn </span>disp(<span class="kw-2">&</span><span class="self">self</span>) -> i32;
<span class="doccomment">/// Check if memory operand is 64 bit.
</span><span class="kw">fn </span>is_64() -> bool;
}
<span class="macro">macro_rules!</span> impl_mem {
($(<span class="attr">#[<span class="macro-nonterminal">$doc</span>:meta] </span><span class="macro-nonterminal">$name</span>:ident)+) => {
$(
<span class="attr">#[<span class="macro-nonterminal">$doc</span>]
</span><span class="kw">pub struct </span><span class="macro-nonterminal">$name </span>{
mode: AddrMode,
base: Reg64,
index: Reg64,
disp: i32,
}
<span class="kw">impl </span>Mem <span class="kw">for </span><span class="macro-nonterminal">$name </span>{
<span class="kw">fn </span>mode(<span class="kw-2">&</span><span class="self">self</span>) -> AddrMode {
<span class="self">self</span>.mode
}
<span class="kw">fn </span>base(<span class="kw-2">&</span><span class="self">self</span>) -> Reg64 {
<span class="self">self</span>.base
}
<span class="kw">fn </span>index(<span class="kw-2">&</span><span class="self">self</span>) -> Reg64 {
<span class="self">self</span>.index
}
<span class="kw">fn </span>disp(<span class="kw-2">&</span><span class="self">self</span>) -> i32 {
<span class="self">self</span>.disp
}
<span class="kw">fn </span>is_64() -> bool {
<span class="kw">use </span>std::any::TypeId;
TypeId::of::<<span class="self">Self</span>>() == TypeId::of::<Mem64>()
}
}
<span class="kw">impl </span><span class="macro-nonterminal">$name </span>{
<span class="doccomment">/// Create a memory operand with `indirect` addressing mode.
/// For example `mov [rax], rcx`.
</span><span class="kw">pub fn </span>indirect(base: Reg64) -> <span class="self">Self </span>{
<span class="self">Self </span>{
mode: AddrMode::Indirect,
base,
index: Reg64::rax, <span class="comment">/* zero index */
</span>disp: <span class="number">0</span>,
}
}
<span class="doccomment">/// Create a memory operand with `indirect + displacement`
/// addressing mode.
/// For example `mov [rax + 0x10], rcx`.
</span><span class="kw">pub fn </span>indirect_disp(base: Reg64, disp: i32) -> <span class="self">Self </span>{
<span class="self">Self </span>{
mode: AddrMode::IndirectDisp,
base,
index: Reg64::rax, <span class="comment">/* zero index */
</span>disp,
}
}
<span class="doccomment">/// Create a memory operand with `base + index` addressing mode.
/// For example `mov [rax + rcx], rdx`.
</span><span class="kw">pub fn </span>indirect_base_index(base: Reg64, index: Reg64) -> <span class="self">Self </span>{
<span class="self">Self </span>{
mode: AddrMode::IndirectBaseIndex,
base,
index,
disp: <span class="number">0</span>,
}
}
}
)+
}
}
<span class="macro">impl_mem!</span>(
<span class="doccomment">/// A memory operand with `byte` size (8 bit).
</span>Mem8
<span class="doccomment">/// A memory operand with `word` size (16 bit).
</span>Mem16
<span class="doccomment">/// A memory operand with `dword` size (32 bit).
</span>Mem32
<span class="doccomment">/// A memory operand with `qword` size (64 bit).
</span>Mem64
);
</code></pre></div></section></main></body></html>
