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| author | johannst <johannst@users.noreply.github.com> | 2023-02-27 22:52:40 +0000 |
|---|---|---|
| committer | johannst <johannst@users.noreply.github.com> | 2023-02-27 22:52:40 +0000 |
| commit | 872cf6d06f4d77637b4627fdc583bab79ee2372f (patch) | |
| tree | 07022610d914be3813d283577a71a18f26b81d64 /src/juicebox_asm/reg.rs.html | |
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class="rust"><code><span class="doccomment">/// Trait to interact with register operands. +</span><span class="kw">pub</span>(<span class="kw">crate</span>) <span class="kw">trait </span>Reg { + <span class="doccomment">/// Get the raw x64 register code. + </span><span class="kw">fn </span>idx(<span class="kw-2">&</span><span class="self">self</span>) -> u8; + + <span class="doccomment">/// Check if the registers needs the `REX.W` bit. + </span><span class="kw">fn </span>rexw(<span class="kw-2">&</span><span class="self">self</span>) -> bool; + + <span class="doccomment">/// Check if the register is an extended registers. + </span><span class="kw">fn </span>is_ext(<span class="kw-2">&</span><span class="self">self</span>) -> bool { + <span class="self">self</span>.idx() > <span class="number">7 + </span>} + + <span class="doccomment">/// Check if the register requires a `REX` byte. + </span><span class="kw">fn </span>need_rex(<span class="kw-2">&</span><span class="self">self</span>) -> bool { + <span class="self">self</span>.is_ext() || <span class="self">self</span>.rexw() + } + + <span class="doccomment">/// Check if the register requires a `SIB` byte if used as addressing operand. + /// + /// See [64 bit + /// addressing](https://wiki.osdev.org/X86-64_Instruction_Encoding#32.2F64-bit_addressing) for + /// further details. + </span><span class="kw">fn </span>need_sib(<span class="kw-2">&</span><span class="self">self</span>) -> bool { + <span class="self">self</span>.idx() == <span class="number">4 </span>|| <span class="self">self</span>.idx() == <span class="number">12 + </span>} + + <span class="doccomment">/// Check if the register is interpreted as `PC` relative if used as addressing operand. + /// + /// See [64 bit + /// addressing](https://wiki.osdev.org/X86-64_Instruction_Encoding#32.2F64-bit_addressing) for + /// further details. + </span><span class="kw">fn </span>is_pc_rel(<span class="kw-2">&</span><span class="self">self</span>) -> bool { + <span class="self">self</span>.idx() == <span class="number">5 </span>|| <span class="self">self</span>.idx() == <span class="number">13 + </span>} +} + +<span class="macro">macro_rules! </span>impl_reg { + (ENUM_ONLY, <span class="macro-nonterminal">$name</span>:ident, { $(<span class="macro-nonterminal">$reg</span>:ident),+ $(,)<span class="question-mark">? </span>}) => { + <span class="doccomment">/// General purpose register operands. + </span><span class="attr">#[allow(non_camel_case_types)] + #[derive(Copy, Clone)] + #[repr(u8)] + </span><span class="kw">pub enum </span><span class="macro-nonterminal">$name </span>{ + $( <span class="macro-nonterminal">$reg</span>, )+ + } + + <span class="attr">#[cfg(test)] + </span><span class="kw">impl </span><span class="macro-nonterminal">$name </span>{ + <span class="kw">fn </span>iter() -> <span class="kw">impl </span>Iterator<Item = <span class="kw-2">&</span><span class="lifetime">'static </span><span class="macro-nonterminal">$name</span>> { + <span class="kw">use </span><span class="macro-nonterminal">$name</span>::<span class="kw-2">*</span>; + [$( <span class="macro-nonterminal">$reg</span>, )+].iter() + } + } + }; + + (<span class="macro-nonterminal">$name</span>:ident, <span class="macro-nonterminal">$rexw</span>:expr, { $(<span class="macro-nonterminal">$reg</span>:ident),+ $(,)<span class="question-mark">? </span>}) => { + <span class="macro">impl_reg!</span>(ENUM_ONLY, <span class="macro-nonterminal">$name</span>, { $( <span class="macro-nonterminal">$reg</span>, )+ }); + + <span class="kw">impl </span>Reg <span class="kw">for </span><span class="macro-nonterminal">$name </span>{ + <span class="doccomment">/// Get the raw x64 register code. + </span><span class="kw">fn </span>idx(<span class="kw-2">&</span><span class="self">self</span>) -> u8 { + <span class="kw-2">*</span><span class="self">self </span><span class="kw">as </span>u8 + } + + <span class="doccomment">/// Check if the registers needs the `REX.W` bit. + </span><span class="kw">fn </span>rexw(<span class="kw-2">&</span><span class="self">self</span>) -> bool { + <span class="macro-nonterminal">$rexw + </span>} + } + } +} + +<span class="macro">impl_reg!</span>(Reg64, <span class="bool-val">true</span>, { rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi, r8, r9, r10, r11, r12, r13, r14, r15 }); +<span class="macro">impl_reg!</span>(Reg32, <span class="bool-val">false</span>, { eax, ecx, edx, ebx, esp, ebp, esi, edi, r8d, r9d, r10d, r11d, r12d, r13d, r14d, r15d }); +<span class="macro">impl_reg!</span>(Reg16, <span class="bool-val">false</span>, { ax, cx, dx, bx, sp, bp, si, di, r8w, r9w, r10w, r11w, r12w, r13w, r14w, r15w }); +<span class="macro">impl_reg!</span>(ENUM_ONLY, + Reg8, { al, cl, dl, bl, spl, bpl, sil, dil, r8l, r9l, r10l, r11l, r12l, r13l, r14l, r15l, + ah, ch, dh, bh }); + +<span class="kw">impl </span>Reg <span class="kw">for </span>Reg8 { + <span class="doccomment">/// Get the raw x64 register code. + </span><span class="kw">fn </span>idx(<span class="kw-2">&</span><span class="self">self</span>) -> u8 { + <span class="kw">match </span><span class="self">self </span>{ + Reg8::ah => <span class="number">4</span>, + Reg8::ch => <span class="number">5</span>, + Reg8::dh => <span class="number">6</span>, + Reg8::bh => <span class="number">7</span>, + <span class="kw">_ </span>=> <span class="kw-2">*</span><span class="self">self </span><span class="kw">as </span>u8, + } + } + + <span class="doccomment">/// Check if the registers needs the `REX.W` bit. + </span><span class="kw">fn </span>rexw(<span class="kw-2">&</span><span class="self">self</span>) -> bool { + <span class="bool-val">false + </span>} + + <span class="doccomment">/// Check whether the gp register needs a `REX` prefix + /// Check if the register requires a `REX` byte. + /// + /// For 1 byte addressing, register indexes `[4:7]` require a `REX` prefix, or else they will + /// be decoded as `{AH, CH, DH, BH}` accordingly. + /// + /// See [Registers](https://wiki.osdev.org/X86-64_Instruction_Encoding#Registers) for + /// further details or conduct `Table 3-1. Register Codes` in the *Intel Software Developers + /// Manual - Volume 2*. + </span><span class="kw">fn </span>need_rex(<span class="kw-2">&</span><span class="self">self</span>) -> bool { + <span class="self">self</span>.idx() > <span class="number">7 </span>|| <span class="macro">matches!</span>(<span class="self">self</span>, Reg8::spl | Reg8::bpl | Reg8::sil | Reg8::dil) + } +} + +<span class="attr">#[cfg(test)] +</span><span class="kw">mod </span>tests { + <span class="kw">use super</span>::<span class="kw-2">*</span>; + + <span class="attr">#[test] + </span><span class="kw">fn </span>test_reg8() { + <span class="kw">use </span>Reg8::<span class="kw-2">*</span>; + + <span class="kw">for </span>r <span class="kw">in </span>Reg8::iter() { + <span class="comment">// Check register index. + </span><span class="kw">let </span>idx = <span class="kw">match </span>r { + al => <span class="number">0</span>, + cl => <span class="number">1</span>, + dl => <span class="number">2</span>, + bl => <span class="number">3</span>, + spl => <span class="number">4</span>, + bpl => <span class="number">5</span>, + sil => <span class="number">6</span>, + dil => <span class="number">7</span>, + r8l => <span class="number">8</span>, + r9l => <span class="number">9</span>, + r10l => <span class="number">10</span>, + r11l => <span class="number">11</span>, + r12l => <span class="number">12</span>, + r13l => <span class="number">13</span>, + r14l => <span class="number">14</span>, + r15l => <span class="number">15</span>, + ah => <span class="number">4</span>, + ch => <span class="number">5</span>, + dh => <span class="number">6</span>, + bh => <span class="number">7</span>, + }; + <span class="macro">assert_eq!</span>(r.idx(), idx); + + <span class="comment">// Check REX.W bit. + </span><span class="macro">assert_eq!</span>(r.rexw(), <span class="bool-val">false</span>); + + <span class="comment">// Check need REX byte. + </span><span class="kw">let </span>rex = <span class="kw">match </span>r { + r8l | r9l | r10l | r11l | r12l | r13l | r14l | r15l | spl | bpl | sil | dil => <span class="bool-val">true</span>, + <span class="kw">_ </span>=> <span class="bool-val">false</span>, + }; + <span class="macro">assert_eq!</span>(r.need_rex(), rex); + + <span class="comment">// Check need SIB byte. + </span><span class="kw">let </span>sib = <span class="kw">match </span>r { + spl | r12l | ah => <span class="bool-val">true</span>, + <span class="kw">_ </span>=> <span class="bool-val">false</span>, + }; + <span class="macro">assert_eq!</span>(r.need_sib(), sib); + + <span class="comment">// Check if is PC relative addressing. + </span><span class="kw">let </span>rel = <span class="kw">match </span>r { + bpl | r13l | ch => <span class="bool-val">true</span>, + <span class="kw">_ </span>=> <span class="bool-val">false</span>, + }; + <span class="macro">assert_eq!</span>(r.is_pc_rel(), rel); + } + } + + <span class="attr">#[test] + </span><span class="kw">fn </span>test_reg16() { + <span class="kw">use </span>Reg16::<span class="kw-2">*</span>; + + <span class="kw">for </span>r <span class="kw">in </span>Reg16::iter() { + <span class="comment">// Check register index. + </span><span class="kw">let </span>idx = <span class="kw">match </span>r { + ax => <span class="number">0</span>, + cx => <span class="number">1</span>, + dx => <span class="number">2</span>, + bx => <span class="number">3</span>, + sp => <span class="number">4</span>, + bp => <span class="number">5</span>, + si => <span class="number">6</span>, + di => <span class="number">7</span>, + r8w => <span class="number">8</span>, + r9w => <span class="number">9</span>, + r10w => <span class="number">10</span>, + r11w => <span class="number">11</span>, + r12w => <span class="number">12</span>, + r13w => <span class="number">13</span>, + r14w => <span class="number">14</span>, + r15w => <span class="number">15</span>, + }; + <span class="macro">assert_eq!</span>(r.idx(), idx); + + <span class="comment">// Check REX.W bit. + </span><span class="macro">assert_eq!</span>(r.rexw(), <span class="bool-val">false</span>); + + <span class="comment">// Check need REX byte. + </span><span class="kw">let </span>rex = <span class="kw">match </span>r { + r8w | r9w | r10w | r11w | r12w | r13w | r14w | r15w => <span class="bool-val">true</span>, + <span class="kw">_ </span>=> <span class="bool-val">false</span>, + }; + <span class="macro">assert_eq!</span>(r.need_rex(), rex); + + <span class="comment">// Check need SIB byte. + </span><span class="kw">let </span>sib = <span class="kw">match </span>r { + sp | r12w => <span class="bool-val">true</span>, + <span class="kw">_ </span>=> <span class="bool-val">false</span>, + }; + <span class="macro">assert_eq!</span>(r.need_sib(), sib); + + <span class="comment">// Check if is PC relative addressing. + </span><span class="kw">let </span>rel = <span class="kw">match </span>r { + bp | r13w => <span class="bool-val">true</span>, + <span class="kw">_ </span>=> <span class="bool-val">false</span>, + }; + <span class="macro">assert_eq!</span>(r.is_pc_rel(), rel); + } + } + + <span class="attr">#[test] + </span><span class="kw">fn </span>test_reg32() { + <span class="kw">use </span>Reg32::<span class="kw-2">*</span>; + + <span class="kw">for </span>r <span class="kw">in </span>Reg32::iter() { + <span class="comment">// Check register index. + </span><span class="kw">let </span>idx = <span class="kw">match </span>r { + eax => <span class="number">0</span>, + ecx => <span class="number">1</span>, + edx => <span class="number">2</span>, + ebx => <span class="number">3</span>, + esp => <span class="number">4</span>, + ebp => <span class="number">5</span>, + esi => <span class="number">6</span>, + edi => <span class="number">7</span>, + r8d => <span class="number">8</span>, + r9d => <span class="number">9</span>, + r10d => <span class="number">10</span>, + r11d => <span class="number">11</span>, + r12d => <span class="number">12</span>, + r13d => <span class="number">13</span>, + r14d => <span class="number">14</span>, + r15d => <span class="number">15</span>, + }; + <span class="macro">assert_eq!</span>(r.idx(), idx); + + <span class="comment">// Check REX.W bit. + </span><span class="macro">assert_eq!</span>(r.rexw(), <span class="bool-val">false</span>); + + <span class="comment">// Check need REX byte. + </span><span class="kw">let </span>rex = <span class="kw">match </span>r { + r8d | r9d | r10d | r11d | r12d | r13d | r14d | r15d => <span class="bool-val">true</span>, + <span class="kw">_ </span>=> <span class="bool-val">false</span>, + }; + <span class="macro">assert_eq!</span>(r.need_rex(), rex); + + <span class="comment">// Check need SIB byte. + </span><span class="kw">let </span>sib = <span class="kw">match </span>r { + esp | r12d => <span class="bool-val">true</span>, + <span class="kw">_ </span>=> <span class="bool-val">false</span>, + }; + <span class="macro">assert_eq!</span>(r.need_sib(), sib); + + <span class="comment">// Check if is PC relative addressing. + </span><span class="kw">let </span>rel = <span class="kw">match </span>r { + ebp | r13d => <span class="bool-val">true</span>, + <span class="kw">_ </span>=> <span class="bool-val">false</span>, + }; + <span class="macro">assert_eq!</span>(r.is_pc_rel(), rel); + } + } + + <span class="attr">#[test] + </span><span class="kw">fn </span>test_reg64() { + <span class="kw">use </span>Reg64::<span class="kw-2">*</span>; + + <span class="kw">for </span>r <span class="kw">in </span>Reg64::iter() { + <span class="comment">// Check register index. + </span><span class="kw">let </span>idx = <span class="kw">match </span>r { + rax => <span class="number">0</span>, + rcx => <span class="number">1</span>, + rdx => <span class="number">2</span>, + rbx => <span class="number">3</span>, + rsp => <span class="number">4</span>, + rbp => <span class="number">5</span>, + rsi => <span class="number">6</span>, + rdi => <span class="number">7</span>, + r8 => <span class="number">8</span>, + r9 => <span class="number">9</span>, + r10 => <span class="number">10</span>, + r11 => <span class="number">11</span>, + r12 => <span class="number">12</span>, + r13 => <span class="number">13</span>, + r14 => <span class="number">14</span>, + r15 => <span class="number">15</span>, + }; + <span class="macro">assert_eq!</span>(r.idx(), idx); + + <span class="comment">// Check REX.W bit. + </span><span class="macro">assert_eq!</span>(r.rexw(), <span class="bool-val">true</span>); + + <span class="comment">// Check need REX byte. + </span><span class="macro">assert_eq!</span>(r.need_rex(), <span class="bool-val">true</span>); + + <span class="comment">// Check need SIB byte. + </span><span class="kw">let </span>sib = <span class="kw">match </span>r { + rsp | r12 => <span class="bool-val">true</span>, + <span class="kw">_ </span>=> <span class="bool-val">false</span>, + }; + <span class="macro">assert_eq!</span>(r.need_sib(), sib); + + <span class="comment">// Check if is PC relative addressing. + </span><span class="kw">let </span>rel = <span class="kw">match </span>r { + rbp | r13 => <span class="bool-val">true</span>, + <span class="kw">_ </span>=> <span class="bool-val">false</span>, + }; + <span class="macro">assert_eq!</span>(r.is_pc_rel(), rel); + } + } +} +</code></pre></div> +</section></div></main><div id="rustdoc-vars" data-root-path="../../" data-static-root-path="../../static.files/" data-current-crate="juicebox_asm" data-themes="" data-resource-suffix="" data-rustdoc-version="1.67.1 (d5a82bbd2 2023-02-07)" data-search-js="search-444266647c4dba98.js" data-settings-js="settings-bebeae96e00e4617.js" data-settings-css="settings-af96d9e2fc13e081.css" ></div></body></html>
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