diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/asm.rs | 5 | ||||
| -rw-r--r-- | src/insn/add.rs | 4 | ||||
| -rw-r--r-- | src/insn/mov.rs | 8 | ||||
| -rw-r--r-- | src/insn/test.rs | 4 |
4 files changed, 11 insertions, 10 deletions
@@ -92,7 +92,7 @@ impl Asm { // -- Encode utilities. /// Encode an register-register instruction. - pub(crate) fn encode_rr<T: Reg>(&mut self, opc: u8, op1: T, op2: T) + pub(crate) fn encode_rr<T: Reg>(&mut self, opc: &[u8], op1: T, op2: T) where Self: EncodeRR<T>, { @@ -109,7 +109,8 @@ impl Asm { let rex = <Self as EncodeRR<T>>::rex(op1, op2); self.emit_optional(&[prefix, rex]); - self.emit(&[opc, modrm]); + self.emit(opc); + self.emit(&[modrm]); } /// Encode an offset-immediate instruction. diff --git a/src/insn/add.rs b/src/insn/add.rs index 0a6772a..b8fe96c 100644 --- a/src/insn/add.rs +++ b/src/insn/add.rs @@ -3,13 +3,13 @@ use crate::{Asm, Imm16, MemOp, Reg16, Reg32, Reg64}; impl Add<Reg64, Reg64> for Asm { fn add(&mut self, op1: Reg64, op2: Reg64) { - self.encode_rr(0x01, op1, op2); + self.encode_rr(&[0x01], op1, op2); } } impl Add<Reg32, Reg32> for Asm { fn add(&mut self, op1: Reg32, op2: Reg32) { - self.encode_rr(0x01, op1, op2); + self.encode_rr(&[0x01], op1, op2); } } diff --git a/src/insn/mov.rs b/src/insn/mov.rs index 2f61e07..df45bd6 100644 --- a/src/insn/mov.rs +++ b/src/insn/mov.rs @@ -5,25 +5,25 @@ use crate::{Asm, Imm16, Imm32, Imm64, Imm8, MemOp, Reg16, Reg32, Reg64, Reg8}; impl Mov<Reg64, Reg64> for Asm { fn mov(&mut self, op1: Reg64, op2: Reg64) { - self.encode_rr(0x89, op1, op2); + self.encode_rr(&[0x89], op1, op2); } } impl Mov<Reg32, Reg32> for Asm { fn mov(&mut self, op1: Reg32, op2: Reg32) { - self.encode_rr(0x89, op1, op2); + self.encode_rr(&[0x89], op1, op2); } } impl Mov<Reg16, Reg16> for Asm { fn mov(&mut self, op1: Reg16, op2: Reg16) { - self.encode_rr(0x89, op1, op2); + self.encode_rr(&[0x89], op1, op2); } } impl Mov<Reg8, Reg8> for Asm { fn mov(&mut self, op1: Reg8, op2: Reg8) { - self.encode_rr(0x88, op1, op2); + self.encode_rr(&[0x88], op1, op2); } } diff --git a/src/insn/test.rs b/src/insn/test.rs index e90d855..9bca200 100644 --- a/src/insn/test.rs +++ b/src/insn/test.rs @@ -3,13 +3,13 @@ use crate::{Asm, Imm16, MemOp, Reg32, Reg64}; impl Test<Reg64, Reg64> for Asm { fn test(&mut self, op1: Reg64, op2: Reg64) { - self.encode_rr(0x85, op1, op2); + self.encode_rr(&[0x85], op1, op2); } } impl Test<Reg32, Reg32> for Asm { fn test(&mut self, op1: Reg32, op2: Reg32) { - self.encode_rr(0x85, op1, op2); + self.encode_rr(&[0x85], op1, op2); } } |