From c94a65c993f5da6a86bd1e6d23e359ba2052f836 Mon Sep 17 00:00:00 2001 From: johannst Date: Fri, 13 Dec 2024 00:18:53 +0000 Subject: deploy: 758f014afb8ec5c20ef2fc862fc12e80f65d3d25 --- bf/index.html | 2 +- juicebox_asm/all.html | 2 +- juicebox_asm/enum.MemOp.html | 21 -- juicebox_asm/enum.Reg16.html | 4 +- juicebox_asm/enum.Reg32.html | 4 +- juicebox_asm/enum.Reg64.html | 4 +- juicebox_asm/enum.Reg8.html | 4 +- juicebox_asm/index.html | 4 +- juicebox_asm/insn/trait.Add.html | 2 +- juicebox_asm/insn/trait.Cmp.html | 2 +- juicebox_asm/insn/trait.Dec.html | 2 +- juicebox_asm/insn/trait.Inc.html | 2 +- juicebox_asm/insn/trait.Mov.html | 2 +- juicebox_asm/insn/trait.Sub.html | 2 +- juicebox_asm/insn/trait.Test.html | 2 +- juicebox_asm/mem/struct.Mem16.html | 11 + juicebox_asm/mem/struct.Mem32.html | 11 + juicebox_asm/mem/struct.Mem64.html | 11 + juicebox_asm/mem/struct.Mem8.html | 11 + juicebox_asm/sidebar-items.js | 2 +- juicebox_asm/struct.Asm.html | 10 +- juicebox_asm/struct.Imm16.html | 4 +- juicebox_asm/struct.Imm8.html | 4 +- juicebox_asm/struct.Mem16.html | 19 ++ juicebox_asm/struct.Mem32.html | 19 ++ juicebox_asm/struct.Mem64.html | 19 ++ juicebox_asm/struct.Mem8.html | 19 ++ juicebox_asm/struct.MemOp16.html | 13 -- juicebox_asm/struct.MemOp32.html | 13 -- juicebox_asm/struct.MemOp64.html | 13 -- juicebox_asm/struct.MemOp8.html | 13 -- search-index.js | 4 +- search.desc/juicebox_asm/juicebox_asm-desc-0-.js | 2 +- src-files.js | 4 +- src/bf/bf.rs.html | 26 ++- src/juicebox_asm/asm.rs.html | 148 ++++++------- src/juicebox_asm/insn/add.rs.html | 72 +++++-- src/juicebox_asm/insn/cmp.rs.html | 10 +- src/juicebox_asm/insn/dec.rs.html | 18 +- src/juicebox_asm/insn/inc.rs.html | 18 +- src/juicebox_asm/insn/mov.rs.html | 38 ++-- src/juicebox_asm/insn/sub.rs.html | 8 +- src/juicebox_asm/insn/test.rs.html | 6 +- src/juicebox_asm/lib.rs.html | 154 +------------- src/juicebox_asm/mem.rs.html | 233 +++++++++++++++++++++ src/tiny_vm/tiny_vm.rs.html | 6 +- trait.impl/core/clone/trait.Clone.js | 4 +- trait.impl/core/marker/trait.Copy.js | 4 +- trait.impl/core/marker/trait.Freeze.js | 4 +- trait.impl/core/marker/trait.Send.js | 4 +- trait.impl/core/marker/trait.Sync.js | 4 +- trait.impl/core/marker/trait.Unpin.js | 4 +- .../core/panic/unwind_safe/trait.RefUnwindSafe.js | 4 +- .../core/panic/unwind_safe/trait.UnwindSafe.js | 4 +- 54 files changed, 596 insertions(+), 434 deletions(-) delete mode 100644 juicebox_asm/enum.MemOp.html create mode 100644 juicebox_asm/mem/struct.Mem16.html create mode 100644 juicebox_asm/mem/struct.Mem32.html create mode 100644 juicebox_asm/mem/struct.Mem64.html create mode 100644 juicebox_asm/mem/struct.Mem8.html create mode 100644 juicebox_asm/struct.Mem16.html create mode 100644 juicebox_asm/struct.Mem32.html create mode 100644 juicebox_asm/struct.Mem64.html create mode 100644 juicebox_asm/struct.Mem8.html delete mode 100644 juicebox_asm/struct.MemOp16.html delete mode 100644 juicebox_asm/struct.MemOp32.html delete mode 100644 juicebox_asm/struct.MemOp64.html delete mode 100644 juicebox_asm/struct.MemOp8.html create mode 100644 src/juicebox_asm/mem.rs.html diff --git a/bf/index.html b/bf/index.html index e0a73bd..ead5e8f 100644 --- a/bf/index.html +++ b/bf/index.html @@ -1,4 +1,4 @@ -bf - Rust

Crate bf

source
Expand description

Brainfuck VM.

+bf - Rust

Crate bf

source
Expand description

Brainfuck VM.

This example implements a simple brainfuck interpreter [BrainfuckInterp] and a jit compiler [BrainfuckJit].

diff --git a/juicebox_asm/all.html b/juicebox_asm/all.html index 33ad1d4..1f0ac79 100644 --- a/juicebox_asm/all.html +++ b/juicebox_asm/all.html @@ -1 +1 @@ -List of all items in this crate

List of all items

Structs

Enums

Traits

\ No newline at end of file +List of all items in this crate

List of all items

Structs

Enums

Traits

\ No newline at end of file diff --git a/juicebox_asm/enum.MemOp.html b/juicebox_asm/enum.MemOp.html deleted file mode 100644 index 9f6bc5f..0000000 --- a/juicebox_asm/enum.MemOp.html +++ /dev/null @@ -1,21 +0,0 @@ -MemOp in juicebox_asm - Rust
juicebox_asm

Enum MemOp

source 
pub enum MemOp {
-    Indirect(Reg64),
-    IndirectDisp(Reg64, i32),
-    IndirectBaseIndex(Reg64, Reg64),
-}
Expand description

Type representing a memory operand.

-

Variants§

§

Indirect(Reg64)

An indirect memory operand, eg mov [rax], rcx.

-
§

IndirectDisp(Reg64, i32)

An indirect memory operand with additional displacement, eg mov [rax + 0x10], rcx.

-
§

IndirectBaseIndex(Reg64, Reg64)

An indirect memory operand in the form base + index, eg mov [rax + rcx], rdx.

-

Trait Implementations§

source§

impl Add<MemOp, Imm16> for Asm

source§

fn add(&mut self, op1: MemOp, op2: Imm16)

Emit an add instruction.
source§

impl Add<MemOp, Imm8> for Asm

source§

fn add(&mut self, op1: MemOp, op2: Imm8)

Emit an add instruction.
source§

impl Add<MemOp, Reg16> for Asm

source§

fn add(&mut self, op1: MemOp, op2: Reg16)

Emit an add instruction.
source§

impl Add<MemOp, Reg64> for Asm

source§

fn add(&mut self, op1: MemOp, op2: Reg64)

Emit an add instruction.
source§

impl Add<Reg64, MemOp> for Asm

source§

fn add(&mut self, op1: Reg64, op2: MemOp)

Emit an add instruction.
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impl Clone for MemOp

source§

fn clone(&self) -> MemOp

Returns a copy of the value. Read more
1.0.0 · source§

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more
source§

impl Cmp<MemOp, Imm16> for Asm

source§

fn cmp(&mut self, op1: MemOp, op2: Imm16)

Emit a compare instruction. Read more
source§

impl Cmp<MemOp, Imm8> for Asm

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fn cmp(&mut self, op1: MemOp, op2: Imm8)

Emit a compare instruction. Read more
source§

impl Mov<MemOp, Imm16> for Asm

source§

fn mov(&mut self, op1: MemOp, op2: Imm16)

Emit an move instruction.
source§

impl Mov<MemOp, Reg16> for Asm

source§

fn mov(&mut self, op1: MemOp, op2: Reg16)

Emit an move instruction.
source§

impl Mov<MemOp, Reg32> for Asm

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fn mov(&mut self, op1: MemOp, op2: Reg32)

Emit an move instruction.
source§

impl Mov<MemOp, Reg64> for Asm

source§

fn mov(&mut self, op1: MemOp, op2: Reg64)

Emit an move instruction.
source§

impl Mov<MemOp, Reg8> for Asm

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fn mov(&mut self, op1: MemOp, op2: Reg8)

Emit an move instruction.
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impl Mov<Reg16, MemOp> for Asm

source§

fn mov(&mut self, op1: Reg16, op2: MemOp)

Emit an move instruction.
source§

impl Mov<Reg32, MemOp> for Asm

source§

fn mov(&mut self, op1: Reg32, op2: MemOp)

Emit an move instruction.
source§

impl Mov<Reg64, MemOp> for Asm

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fn mov(&mut self, op1: Reg64, op2: MemOp)

Emit an move instruction.
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impl Mov<Reg8, MemOp> for Asm

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fn mov(&mut self, op1: Reg8, op2: MemOp)

Emit an move instruction.
source§

impl Sub<MemOp, Imm8> for Asm

source§

fn sub(&mut self, op1: MemOp, op2: Imm8)

Emit an sub instruction.
source§

impl Test<MemOp, Imm16> for Asm

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fn test(&mut self, op1: MemOp, op2: Imm16)

Emit a logical compare instruction. Read more
source§

impl Copy for MemOp

Auto Trait Implementations§

§

impl Freeze for MemOp

§

impl RefUnwindSafe for MemOp

§

impl Send for MemOp

§

impl Sync for MemOp

§

impl Unpin for MemOp

§

impl UnwindSafe for MemOp

Blanket Implementations§

source§

impl<T> Any for T
where - T: 'static + ?Sized,

source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
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impl<T> Borrow<T> for T
where - T: ?Sized,

source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
source§

impl<T> BorrowMut<T> for T
where - T: ?Sized,

source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
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impl<T> CloneToUninit for T
where - T: Clone,

source§

unsafe fn clone_to_uninit(&self, dst: *mut T)

🔬This is a nightly-only experimental API. (clone_to_uninit)
Performs copy-assignment from self to dst. Read more
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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

-
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impl<T, U> Into<U> for T
where - U: From<T>,

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fn into(self) -> U

Calls U::from(self).

-

That is, this conversion is whatever the implementation of -From<T> for U chooses to do.

-
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impl<T> ToOwned for T
where - T: Clone,

source§

type Owned = T

The resulting type after obtaining ownership.
source§

fn to_owned(&self) -> T

Creates owned data from borrowed data, usually by cloning. Read more
source§

fn clone_into(&self, target: &mut T)

Uses borrowed data to replace owned data, usually by cloning. Read more
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impl<T, U> TryFrom<U> for T
where - U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.
source§

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for T
where - U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.
\ No newline at end of file diff --git a/juicebox_asm/enum.Reg16.html b/juicebox_asm/enum.Reg16.html index 8818908..b6045e5 100644 --- a/juicebox_asm/enum.Reg16.html +++ b/juicebox_asm/enum.Reg16.html @@ -1,4 +1,4 @@ -Reg16 in juicebox_asm - Rust
juicebox_asm

Enum Reg16

source 
#[repr(u8)]
pub enum Reg16 {
+Reg16 in juicebox_asm - Rust
juicebox_asm
Enum Reg16
source 
#[repr(u8)]
pub enum Reg16 {
 
Show 16 variants    ax = 0,
     cx = 1,
     dx = 2,
@@ -16,7 +16,7 @@
     r14w = 14,
     r15w = 15,
 
}
Expand description
Definition of 16 bit registers.

-
Variants§
§
ax = 0
§
cx = 1
§
dx = 2
§
bx = 3
§
sp = 4
§
bp = 5
§
si = 6
§
di = 7
§
r8w = 8
§
r9w = 9
§
r10w = 10
§
r11w = 11
§
r12w = 12
§
r13w = 13
§
r14w = 14
§
r15w = 15
Trait Implementations§
source§
impl Add<MemOp, Reg16> for Asm
source§
fn add(&mut self, op1: MemOp, op2: Reg16)
Emit an add instruction.
source§
impl Clone for Reg16
source§
fn clone(&self) -> Reg16
Returns a copy of the value. Read more
1.0.0 · source§
fn clone_from(&mut self, source: &Self)
Performs copy-assignment from source. Read more
source§
impl Mov<MemOp, Reg16> for Asm
source§
fn mov(&mut self, op1: MemOp, op2: Reg16)
Emit an move instruction.
source§
impl Mov<Reg16, Imm16> for Asm
source§
fn mov(&mut self, op1: Reg16, op2: Imm16)
Emit an move instruction.
source§
impl Mov<Reg16, MemOp> for Asm
source§
fn mov(&mut self, op1: Reg16, op2: MemOp)
Emit an move instruction.
source§
impl Mov<Reg16, Reg16> for Asm
source§
fn mov(&mut self, op1: Reg16, op2: Reg16)
Emit an move instruction.
source§
impl Pop<Reg16> for Asm
source§
fn pop(&mut self, op1: Reg16)
Emit a pop instruction.
source§
impl Push<Reg16> for Asm
source§
fn push(&mut self, op1: Reg16)
Emit a push instruction.
source§
impl Copy for Reg16
Auto Trait Implementations§
§
impl Freeze for Reg16
§
impl RefUnwindSafe for Reg16
§
impl Send for Reg16
§
impl Sync for Reg16
§
impl Unpin for Reg16
§
impl UnwindSafe for Reg16
Blanket Implementations§
source§
impl<T> Any for T
where
+
Variants§
§
ax = 0
§
cx = 1
§
dx = 2
§
bx = 3
§
sp = 4
§
bp = 5
§
si = 6
§
di = 7
§
r8w = 8
§
r9w = 9
§
r10w = 10
§
r11w = 11
§
r12w = 12
§
r13w = 13
§
r14w = 14
§
r15w = 15
Trait Implementations§
source§
impl Add<Mem16, Reg16> for Asm
source§
fn add(&mut self, op1: Mem16, op2: Reg16)
Emit an add instruction.
source§
impl Clone for Reg16
source§
fn clone(&self) -> Reg16
Returns a copy of the value. Read more
1.0.0 · source§
fn clone_from(&mut self, source: &Self)
Performs copy-assignment from source. Read more
source§
impl Mov<Mem16, Reg16> for Asm
source§
fn mov(&mut self, op1: Mem16, op2: Reg16)
Emit an move instruction.
source§
impl Mov<Reg16, Imm16> for Asm
source§
fn mov(&mut self, op1: Reg16, op2: Imm16)
Emit an move instruction.
source§
impl Mov<Reg16, Mem16> for Asm
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fn mov(&mut self, op1: Reg16, op2: Mem16)
Emit an move instruction.
source§
impl Mov<Reg16, Reg16> for Asm
source§
fn mov(&mut self, op1: Reg16, op2: Reg16)
Emit an move instruction.
source§
impl Pop<Reg16> for Asm
source§
fn pop(&mut self, op1: Reg16)
Emit a pop instruction.
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impl Push<Reg16> for Asm
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fn push(&mut self, op1: Reg16)
Emit a push instruction.
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impl Copy for Reg16
Auto Trait Implementations§
§
impl Freeze for Reg16
§
impl RefUnwindSafe for Reg16
§
impl Send for Reg16
§
impl Sync for Reg16
§
impl Unpin for Reg16
§
impl UnwindSafe for Reg16
Blanket Implementations§
source§
impl<T> Any for T
where
     T: 'static + ?Sized,
source§
fn type_id(&self) -> TypeId
Gets the TypeId of self. Read more
source§
impl<T> Borrow<T> for T
where
     T: ?Sized,
source§
fn borrow(&self) -> &T
Immutably borrows from an owned value. Read more
source§
impl<T> BorrowMut<T> for T
where
     T: ?Sized,
source§
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more
source§
impl<T> CloneToUninit for T
where
diff --git a/juicebox_asm/enum.Reg32.html b/juicebox_asm/enum.Reg32.html
index c8f7857..e024720 100644
--- a/juicebox_asm/enum.Reg32.html
+++ b/juicebox_asm/enum.Reg32.html
@@ -1,4 +1,4 @@
-Reg32 in juicebox_asm - Rust
juicebox_asm
Enum Reg32
source 
#[repr(u8)]
pub enum Reg32 {
+Reg32 in juicebox_asm - Rust
juicebox_asm
Enum Reg32
source 
#[repr(u8)]
pub enum Reg32 {
 
Show 16 variants    eax = 0,
     ecx = 1,
     edx = 2,
@@ -16,7 +16,7 @@
     r14d = 14,
     r15d = 15,
 
}
Expand description
Definition of 32 bit registers.

-
Variants§
§
eax = 0
§
ecx = 1
§
edx = 2
§
ebx = 3
§
esp = 4
§
ebp = 5
§
esi = 6
§
edi = 7
§
r8d = 8
§
r9d = 9
§
r10d = 10
§
r11d = 11
§
r12d = 12
§
r13d = 13
§
r14d = 14
§
r15d = 15
Trait Implementations§
source§
impl Add<Reg32, Reg32> for Asm
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fn add(&mut self, op1: Reg32, op2: Reg32)
Emit an add instruction.
source§
impl Clone for Reg32
source§
fn clone(&self) -> Reg32
Returns a copy of the value. Read more
1.0.0 · source§
fn clone_from(&mut self, source: &Self)
Performs copy-assignment from source. Read more
source§
impl Dec<Reg32> for Asm
source§
fn dec(&mut self, op1: Reg32)
Emit a decrement instruction.
source§
impl Inc<Reg32> for Asm
source§
fn inc(&mut self, op1: Reg32)
Emit a increment instruction.
source§
impl Mov<MemOp, Reg32> for Asm
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fn mov(&mut self, op1: MemOp, op2: Reg32)
Emit an move instruction.
source§
impl Mov<Reg32, Imm32> for Asm
source§
fn mov(&mut self, op1: Reg32, op2: Imm32)
Emit an move instruction.
source§
impl Mov<Reg32, MemOp> for Asm
source§
fn mov(&mut self, op1: Reg32, op2: MemOp)
Emit an move instruction.
source§
impl Mov<Reg32, Reg32> for Asm
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fn mov(&mut self, op1: Reg32, op2: Reg32)
Emit an move instruction.
source§
impl Test<Reg32, Reg32> for Asm
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fn test(&mut self, op1: Reg32, op2: Reg32)
Emit a logical compare instruction. Read more
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impl Copy for Reg32
Auto Trait Implementations§
§
impl Freeze for Reg32
§
impl RefUnwindSafe for Reg32
§
impl Send for Reg32
§
impl Sync for Reg32
§
impl Unpin for Reg32
§
impl UnwindSafe for Reg32
Blanket Implementations§
source§
impl<T> Any for T
where
+
Variants§
§
eax = 0
§
ecx = 1
§
edx = 2
§
ebx = 3
§
esp = 4
§
ebp = 5
§
esi = 6
§
edi = 7
§
r8d = 8
§
r9d = 9
§
r10d = 10
§
r11d = 11
§
r12d = 12
§
r13d = 13
§
r14d = 14
§
r15d = 15
Trait Implementations§
source§
impl Add<Reg32, Reg32> for Asm
source§
fn add(&mut self, op1: Reg32, op2: Reg32)
Emit an add instruction.
source§
impl Clone for Reg32
source§
fn clone(&self) -> Reg32
Returns a copy of the value. Read more
1.0.0 · source§
fn clone_from(&mut self, source: &Self)
Performs copy-assignment from source. Read more
source§
impl Dec<Reg32> for Asm
source§
fn dec(&mut self, op1: Reg32)
Emit a decrement instruction.
source§
impl Inc<Reg32> for Asm
source§
fn inc(&mut self, op1: Reg32)
Emit a increment instruction.
source§
impl Mov<Mem32, Reg32> for Asm
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fn mov(&mut self, op1: Mem32, op2: Reg32)
Emit an move instruction.
source§
impl Mov<Reg32, Imm32> for Asm
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fn mov(&mut self, op1: Reg32, op2: Imm32)
Emit an move instruction.
source§
impl Mov<Reg32, Mem32> for Asm
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fn mov(&mut self, op1: Reg32, op2: Mem32)
Emit an move instruction.
source§
impl Mov<Reg32, Reg32> for Asm
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fn mov(&mut self, op1: Reg32, op2: Reg32)
Emit an move instruction.
source§
impl Test<Reg32, Reg32> for Asm
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fn test(&mut self, op1: Reg32, op2: Reg32)
Emit a logical compare instruction. Read more
source§
impl Copy for Reg32
Auto Trait Implementations§
§
impl Freeze for Reg32
§
impl RefUnwindSafe for Reg32
§
impl Send for Reg32
§
impl Sync for Reg32
§
impl Unpin for Reg32
§
impl UnwindSafe for Reg32
Blanket Implementations§
source§
impl<T> Any for T
where
     T: 'static + ?Sized,
source§
fn type_id(&self) -> TypeId
Gets the TypeId of self. Read more
source§
impl<T> Borrow<T> for T
where
     T: ?Sized,
source§
fn borrow(&self) -> &T
Immutably borrows from an owned value. Read more
source§
impl<T> BorrowMut<T> for T
where
     T: ?Sized,
source§
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more
source§
impl<T> CloneToUninit for T
where
diff --git a/juicebox_asm/enum.Reg64.html b/juicebox_asm/enum.Reg64.html
index 137f8ea..4ea005a 100644
--- a/juicebox_asm/enum.Reg64.html
+++ b/juicebox_asm/enum.Reg64.html
@@ -1,4 +1,4 @@
-Reg64 in juicebox_asm - Rust
juicebox_asm
Enum Reg64
source 
#[repr(u8)]
pub enum Reg64 {
+Reg64 in juicebox_asm - Rust
juicebox_asm
Enum Reg64
source 
#[repr(u8)]
pub enum Reg64 {
 
Show 16 variants    rax = 0,
     rcx = 1,
     rdx = 2,
@@ -16,7 +16,7 @@
     r14 = 14,
     r15 = 15,
 
}
Expand description
Definition of 64 bit registers.

-
Variants§
§
rax = 0
§
rcx = 1
§
rdx = 2
§
rbx = 3
§
rsp = 4
§
rbp = 5
§
rsi = 6
§
rdi = 7
§
r8 = 8
§
r9 = 9
§
r10 = 10
§
r11 = 11
§
r12 = 12
§
r13 = 13
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r14 = 14
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r15 = 15
Trait Implementations§
source§
impl Add<MemOp, Reg64> for Asm
source§
fn add(&mut self, op1: MemOp, op2: Reg64)
Emit an add instruction.
source§
impl Add<Reg64, MemOp> for Asm
source§
fn add(&mut self, op1: Reg64, op2: MemOp)
Emit an add instruction.
source§
impl Add<Reg64, Reg64> for Asm
source§
fn add(&mut self, op1: Reg64, op2: Reg64)
Emit an add instruction.
source§
impl Call<Reg64> for Asm
source§
fn call(&mut self, op1: Reg64)
Emit a call instruction.
source§
impl Clone for Reg64
source§
fn clone(&self) -> Reg64
Returns a copy of the value. Read more
1.0.0 · source§
fn clone_from(&mut self, source: &Self)
Performs copy-assignment from source. Read more
source§
impl Cmovnz<Reg64, Reg64> for Asm
source§
fn cmovnz(&mut self, op1: Reg64, op2: Reg64)
Emit a (conditional) move if not zero instruction. Read more
source§
impl Cmovz<Reg64, Reg64> for Asm
source§
fn cmovz(&mut self, op1: Reg64, op2: Reg64)
Emit a (conditional) move if zero instruction. Read more
source§
impl Dec<Reg64> for Asm
source§
fn dec(&mut self, op1: Reg64)
Emit a decrement instruction.
source§
impl Inc<Reg64> for Asm
source§
fn inc(&mut self, op1: Reg64)
Emit a increment instruction.
source§
impl Mov<MemOp, Reg64> for Asm
source§
fn mov(&mut self, op1: MemOp, op2: Reg64)
Emit an move instruction.
source§
impl Mov<Reg64, Imm64> for Asm
source§
fn mov(&mut self, op1: Reg64, op2: Imm64)
Emit an move instruction.
source§
impl Mov<Reg64, MemOp> for Asm
source§
fn mov(&mut self, op1: Reg64, op2: MemOp)
Emit an move instruction.
source§
impl Mov<Reg64, Reg64> for Asm
source§
fn mov(&mut self, op1: Reg64, op2: Reg64)
Emit an move instruction.
source§
impl Pop<Reg64> for Asm
source§
fn pop(&mut self, op1: Reg64)
Emit a pop instruction.
source§
impl Push<Reg64> for Asm
source§
fn push(&mut self, op1: Reg64)
Emit a push instruction.
source§
impl Sub<Reg64, Reg64> for Asm
source§
fn sub(&mut self, op1: Reg64, op2: Reg64)
Emit an sub instruction.
source§
impl Test<Reg64, Reg64> for Asm
source§
fn test(&mut self, op1: Reg64, op2: Reg64)
Emit a logical compare instruction. Read more
source§
impl Xor<Reg64, Reg64> for Asm
source§
fn xor(&mut self, op1: Reg64, op2: Reg64)
Emit a xor instruction.
source§
impl Copy for Reg64
Auto Trait Implementations§
§
impl Freeze for Reg64
§
impl RefUnwindSafe for Reg64
§
impl Send for Reg64
§
impl Sync for Reg64
§
impl Unpin for Reg64
§
impl UnwindSafe for Reg64
Blanket Implementations§
source§
impl<T> Any for T
where
+
Variants§
§
rax = 0
§
rcx = 1
§
rdx = 2
§
rbx = 3
§
rsp = 4
§
rbp = 5
§
rsi = 6
§
rdi = 7
§
r8 = 8
§
r9 = 9
§
r10 = 10
§
r11 = 11
§
r12 = 12
§
r13 = 13
§
r14 = 14
§
r15 = 15
Trait Implementations§
source§
impl Add<Mem64, Reg64> for Asm
source§
fn add(&mut self, op1: Mem64, op2: Reg64)
Emit an add instruction.
source§
impl Add<Reg64, Mem64> for Asm
source§
fn add(&mut self, op1: Reg64, op2: Mem64)
Emit an add instruction.
source§
impl Add<Reg64, Reg64> for Asm
source§
fn add(&mut self, op1: Reg64, op2: Reg64)
Emit an add instruction.
source§
impl Call<Reg64> for Asm
source§
fn call(&mut self, op1: Reg64)
Emit a call instruction.
source§
impl Clone for Reg64
source§
fn clone(&self) -> Reg64
Returns a copy of the value. Read more
1.0.0 · source§
fn clone_from(&mut self, source: &Self)
Performs copy-assignment from source. Read more
source§
impl Cmovnz<Reg64, Reg64> for Asm
source§
fn cmovnz(&mut self, op1: Reg64, op2: Reg64)
Emit a (conditional) move if not zero instruction. Read more
source§
impl Cmovz<Reg64, Reg64> for Asm
source§
fn cmovz(&mut self, op1: Reg64, op2: Reg64)
Emit a (conditional) move if zero instruction. Read more
source§
impl Dec<Reg64> for Asm
source§
fn dec(&mut self, op1: Reg64)
Emit a decrement instruction.
source§
impl Inc<Reg64> for Asm
source§
fn inc(&mut self, op1: Reg64)
Emit a increment instruction.
source§
impl Mov<Mem64, Reg64> for Asm
source§
fn mov(&mut self, op1: Mem64, op2: Reg64)
Emit an move instruction.
source§
impl Mov<Reg64, Imm64> for Asm
source§
fn mov(&mut self, op1: Reg64, op2: Imm64)
Emit an move instruction.
source§
impl Mov<Reg64, Mem64> for Asm
source§
fn mov(&mut self, op1: Reg64, op2: Mem64)
Emit an move instruction.
source§
impl Mov<Reg64, Reg64> for Asm
source§
fn mov(&mut self, op1: Reg64, op2: Reg64)
Emit an move instruction.
source§
impl Pop<Reg64> for Asm
source§
fn pop(&mut self, op1: Reg64)
Emit a pop instruction.
source§
impl Push<Reg64> for Asm
source§
fn push(&mut self, op1: Reg64)
Emit a push instruction.
source§
impl Sub<Reg64, Reg64> for Asm
source§
fn sub(&mut self, op1: Reg64, op2: Reg64)
Emit an sub instruction.
source§
impl Test<Reg64, Reg64> for Asm
source§
fn test(&mut self, op1: Reg64, op2: Reg64)
Emit a logical compare instruction. Read more
source§
impl Xor<Reg64, Reg64> for Asm
source§
fn xor(&mut self, op1: Reg64, op2: Reg64)
Emit a xor instruction.
source§
impl Copy for Reg64
Auto Trait Implementations§
§
impl Freeze for Reg64
§
impl RefUnwindSafe for Reg64
§
impl Send for Reg64
§
impl Sync for Reg64
§
impl Unpin for Reg64
§
impl UnwindSafe for Reg64
Blanket Implementations§
source§
impl<T> Any for T
where
     T: 'static + ?Sized,
source§
fn type_id(&self) -> TypeId
Gets the TypeId of self. Read more
source§
impl<T> Borrow<T> for T
where
     T: ?Sized,
source§
fn borrow(&self) -> &T
Immutably borrows from an owned value. Read more
source§
impl<T> BorrowMut<T> for T
where
     T: ?Sized,
source§
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more
source§
impl<T> CloneToUninit for T
where
diff --git a/juicebox_asm/enum.Reg8.html b/juicebox_asm/enum.Reg8.html
index 38c3a49..9ab485d 100644
--- a/juicebox_asm/enum.Reg8.html
+++ b/juicebox_asm/enum.Reg8.html
@@ -1,4 +1,4 @@
-Reg8 in juicebox_asm - Rust
juicebox_asm
Enum Reg8
source 
#[repr(u8)]
pub enum Reg8 {
+Reg8 in juicebox_asm - Rust
juicebox_asm
Enum Reg8
source 
#[repr(u8)]
pub enum Reg8 {
 
Show 20 variants    al = 0,
     cl = 1,
     dl = 2,
@@ -20,7 +20,7 @@
     dh = 18,
     bh = 19,
 
}
Expand description
Definition of 8 bit registers.

-
Variants§
§
al = 0
§
cl = 1
§
dl = 2
§
bl = 3
§
spl = 4
§
bpl = 5
§
sil = 6
§
dil = 7
§
r8l = 8
§
r9l = 9
§
r10l = 10
§
r11l = 11
§
r12l = 12
§
r13l = 13
§
r14l = 14
§
r15l = 15
§
ah = 16
§
ch = 17
§
dh = 18
§
bh = 19
Trait Implementations§
source§
impl Clone for Reg8
source§
fn clone(&self) -> Reg8
Returns a copy of the value. Read more
1.0.0 · source§
fn clone_from(&mut self, source: &Self)
Performs copy-assignment from source. Read more
source§
impl Mov<MemOp, Reg8> for Asm
source§
fn mov(&mut self, op1: MemOp, op2: Reg8)
Emit an move instruction.
source§
impl Mov<Reg8, Imm8> for Asm
source§
fn mov(&mut self, op1: Reg8, op2: Imm8)
Emit an move instruction.
source§
impl Mov<Reg8, MemOp> for Asm
source§
fn mov(&mut self, op1: Reg8, op2: MemOp)
Emit an move instruction.
source§
impl Mov<Reg8, Reg8> for Asm
source§
fn mov(&mut self, op1: Reg8, op2: Reg8)
Emit an move instruction.
source§
impl Copy for Reg8
Auto Trait Implementations§
§
impl Freeze for Reg8
§
impl RefUnwindSafe for Reg8
§
impl Send for Reg8
§
impl Sync for Reg8
§
impl Unpin for Reg8
§
impl UnwindSafe for Reg8
Blanket Implementations§
source§
impl<T> Any for T
where
+
Variants§
§
al = 0
§
cl = 1
§
dl = 2
§
bl = 3
§
spl = 4
§
bpl = 5
§
sil = 6
§
dil = 7
§
r8l = 8
§
r9l = 9
§
r10l = 10
§
r11l = 11
§
r12l = 12
§
r13l = 13
§
r14l = 14
§
r15l = 15
§
ah = 16
§
ch = 17
§
dh = 18
§
bh = 19
Trait Implementations§
source§
impl Clone for Reg8
source§
fn clone(&self) -> Reg8
Returns a copy of the value. Read more
1.0.0 · source§
fn clone_from(&mut self, source: &Self)
Performs copy-assignment from source. Read more
source§
impl Mov<Mem8, Reg8> for Asm
source§
fn mov(&mut self, op1: Mem8, op2: Reg8)
Emit an move instruction.
source§
impl Mov<Reg8, Imm8> for Asm
source§
fn mov(&mut self, op1: Reg8, op2: Imm8)
Emit an move instruction.
source§
impl Mov<Reg8, Mem8> for Asm
source§
fn mov(&mut self, op1: Reg8, op2: Mem8)
Emit an move instruction.
source§
impl Mov<Reg8, Reg8> for Asm
source§
fn mov(&mut self, op1: Reg8, op2: Reg8)
Emit an move instruction.
source§
impl Copy for Reg8
Auto Trait Implementations§
§
impl Freeze for Reg8
§
impl RefUnwindSafe for Reg8
§
impl Send for Reg8
§
impl Sync for Reg8
§
impl Unpin for Reg8
§
impl UnwindSafe for Reg8
Blanket Implementations§
source§
impl<T> Any for T
where
     T: 'static + ?Sized,
source§
fn type_id(&self) -> TypeId
Gets the TypeId of self. Read more
source§
impl<T> Borrow<T> for T
where
     T: ?Sized,
source§
fn borrow(&self) -> &T
Immutably borrows from an owned value. Read more
source§
impl<T> BorrowMut<T> for T
where
     T: ?Sized,
source§
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more
source§
impl<T> CloneToUninit for T
where
diff --git a/juicebox_asm/index.html b/juicebox_asm/index.html
index 82627c1..ae482cb 100644
--- a/juicebox_asm/index.html
+++ b/juicebox_asm/index.html
@@ -1,4 +1,4 @@
-juicebox_asm - Rust
Crate juicebox_asm
source 
Expand description
A simple x64 jit assembler with a minimal runtime to execute emitted code for fun.

+juicebox_asm - Rust
Crate juicebox_asm
source 
Expand description
A simple x64 jit assembler with a minimal runtime to execute emitted code for fun.

 
The following is an fibonacci example implementation.

 
 
use juicebox_asm::{Asm, Reg64, Imm64, Label};
@@ -70,4 +70,4 @@
         assert_eq!(fib_jit, fib_rs(n));
     }
 }

-
Modules§
  • insn
    Trait definitions of various instructions.
Structs§
  • Asm
    x64 jit assembler.
  • Imm8
    Type representing an 8 bit immediate.
  • Imm16
    Type representing a 16 bit immediate.
  • Imm32
    Type representing a 32 bit immediate.
  • Imm64
    Type representing a 64 bit immediate.
  • Label
    A label which is used as target for jump instructions.
  • MemOp8
    A memory operand with a word (8 bit) size hint.
  • MemOp16
    A memory operand with a word (16 bit) size hint.
  • MemOp32
    A memory operand with a dword (32 bit) size hint.
  • MemOp64
    A memory operand with a qword (64 bit) size hint.
  • Runtime
    A simple mmaped runtime with executable pages.
Enums§
  • MemOp
    Type representing a memory operand.
  • Reg8
    Definition of 8 bit registers.
  • Reg16
    Definition of 16 bit registers.
  • Reg32
    Definition of 32 bit registers.
  • Reg64
    Definition of 64 bit registers.

\ No newline at end of file
+
Modules§
  • insn
    Trait definitions of various instructions.
Structs§
  • Asm
    x64 jit assembler.
  • Imm8
    Type representing an 8 bit immediate.
  • Imm16
    Type representing a 16 bit immediate.
  • Imm32
    Type representing a 32 bit immediate.
  • Imm64
    Type representing a 64 bit immediate.
  • Label
    A label which is used as target for jump instructions.
  • Mem8
    A memory operand with byte size (8 bit).
  • Mem16
    A memory operand with word size (16 bit).
  • Mem32
    A memory operand with dword size (32 bit).
  • Mem64
    A memory operand with qword size (64 bit).
  • Runtime
    A simple mmaped runtime with executable pages.
Enums§
  • Reg8
    Definition of 8 bit registers.
  • Reg16
    Definition of 16 bit registers.
  • Reg32
    Definition of 32 bit registers.
  • Reg64
    Definition of 64 bit registers.

\ No newline at end of file
diff --git a/juicebox_asm/insn/trait.Add.html b/juicebox_asm/insn/trait.Add.html
index a7fc8e3..5223362 100644
--- a/juicebox_asm/insn/trait.Add.html
+++ b/juicebox_asm/insn/trait.Add.html
@@ -3,4 +3,4 @@
     fn add(&mut self, op1: T, op2: U);
 }
Expand description
Trait for add instruction kinds.

 
Required Methods§
source
fn add(&mut self, op1: T, op2: U)
Emit an add instruction.

-
Implementors§

\ No newline at end of file
+
Implementors§

\ No newline at end of file
diff --git a/juicebox_asm/insn/trait.Cmp.html b/juicebox_asm/insn/trait.Cmp.html
index dae9656..46fd3d6 100644
--- a/juicebox_asm/insn/trait.Cmp.html
+++ b/juicebox_asm/insn/trait.Cmp.html
@@ -5,4 +5,4 @@
 
Required Methods§
source
fn cmp(&mut self, op1: T, op2: U)
Emit a compare instruction.

 
Computes op2 - op1 and sets the status flags in the same way as the sub instruction,
 the result is discarded.

-
Implementors§

\ No newline at end of file
+
Implementors§

\ No newline at end of file
diff --git a/juicebox_asm/insn/trait.Dec.html b/juicebox_asm/insn/trait.Dec.html
index dce0e58..e07cade 100644
--- a/juicebox_asm/insn/trait.Dec.html
+++ b/juicebox_asm/insn/trait.Dec.html
@@ -3,4 +3,4 @@
     fn dec(&mut self, op1: T);
 }
Expand description

Trait for dec instruction kinds.

Required Methods§

source

fn dec(&mut self, op1: T)

Emit a decrement instruction.

-

Implementors§

\ No newline at end of file +

Implementors§

\ No newline at end of file diff --git a/juicebox_asm/insn/trait.Inc.html b/juicebox_asm/insn/trait.Inc.html index 46bc9aa..20295b7 100644 --- a/juicebox_asm/insn/trait.Inc.html +++ b/juicebox_asm/insn/trait.Inc.html @@ -3,4 +3,4 @@ fn inc(&mut self, op1: T); }
Expand description

Trait for inc instruction kinds.

Required Methods§

source

fn inc(&mut self, op1: T)

Emit a increment instruction.

-

Implementors§

source§

impl Inc<Reg32> for Asm

source§

impl Inc<Reg64> for Asm

source§

impl Inc<MemOp8> for Asm

source§

impl Inc<MemOp16> for Asm

source§

impl Inc<MemOp32> for Asm

source§

impl Inc<MemOp64> for Asm

\ No newline at end of file +

Implementors§

source§

impl Inc<Reg32> for Asm

source§

impl Inc<Reg64> for Asm

source§

impl Inc<Mem8> for Asm

source§

impl Inc<Mem16> for Asm

source§

impl Inc<Mem32> for Asm

source§

impl Inc<Mem64> for Asm

\ No newline at end of file diff --git a/juicebox_asm/insn/trait.Mov.html b/juicebox_asm/insn/trait.Mov.html index 1d1156c..23ca5ad 100644 --- a/juicebox_asm/insn/trait.Mov.html +++ b/juicebox_asm/insn/trait.Mov.html @@ -3,4 +3,4 @@ fn mov(&mut self, op1: T, op2: U); }
Expand description

Trait for mov instruction kinds.

Required Methods§

source

fn mov(&mut self, op1: T, op2: U)

Emit an move instruction.

-

Implementors§

source§

impl Mov<MemOp, Reg8> for Asm

source§

impl Mov<MemOp, Reg16> for Asm

source§

impl Mov<MemOp, Reg32> for Asm

source§

impl Mov<MemOp, Reg64> for Asm

source§

impl Mov<MemOp, Imm16> for Asm

source§

impl Mov<Reg8, MemOp> for Asm

source§

impl Mov<Reg8, Reg8> for Asm

source§

impl Mov<Reg8, Imm8> for Asm

source§

impl Mov<Reg16, MemOp> for Asm

source§

impl Mov<Reg16, Reg16> for Asm

source§

impl Mov<Reg16, Imm16> for Asm

source§

impl Mov<Reg32, MemOp> for Asm

source§

impl Mov<Reg32, Reg32> for Asm

source§

impl Mov<Reg32, Imm32> for Asm

source§

impl Mov<Reg64, MemOp> for Asm

source§

impl Mov<Reg64, Reg64> for Asm

source§

impl Mov<Reg64, Imm64> for Asm

\ No newline at end of file +

Implementors§

source§

impl Mov<Reg8, Reg8> for Asm

source§

impl Mov<Reg8, Imm8> for Asm

source§

impl Mov<Reg8, Mem8> for Asm

source§

impl Mov<Reg16, Reg16> for Asm

source§

impl Mov<Reg16, Imm16> for Asm

source§

impl Mov<Reg16, Mem16> for Asm

source§

impl Mov<Reg32, Reg32> for Asm

source§

impl Mov<Reg32, Imm32> for Asm

source§

impl Mov<Reg32, Mem32> for Asm

source§

impl Mov<Reg64, Reg64> for Asm

source§

impl Mov<Reg64, Imm64> for Asm

source§

impl Mov<Reg64, Mem64> for Asm

source§

impl Mov<Mem8, Reg8> for Asm

source§

impl Mov<Mem16, Reg16> for Asm

source§

impl Mov<Mem16, Imm16> for Asm

source§

impl Mov<Mem32, Reg32> for Asm

source§

impl Mov<Mem64, Reg64> for Asm

\ No newline at end of file diff --git a/juicebox_asm/insn/trait.Sub.html b/juicebox_asm/insn/trait.Sub.html index ff300fd..5a093f6 100644 --- a/juicebox_asm/insn/trait.Sub.html +++ b/juicebox_asm/insn/trait.Sub.html @@ -3,4 +3,4 @@ fn sub(&mut self, op1: T, op2: U); }
Expand description

Trait for sub instruction kinds.

Required Methods§

source

fn sub(&mut self, op1: T, op2: U)

Emit an sub instruction.

-

Implementors§

source§

impl Sub<MemOp, Imm8> for Asm

source§

impl Sub<Reg64, Reg64> for Asm

\ No newline at end of file +

Implementors§

source§

impl Sub<Reg64, Reg64> for Asm

source§

impl Sub<Mem8, Imm8> for Asm

\ No newline at end of file diff --git a/juicebox_asm/insn/trait.Test.html b/juicebox_asm/insn/trait.Test.html index 4cca689..a592e63 100644 --- a/juicebox_asm/insn/trait.Test.html +++ b/juicebox_asm/insn/trait.Test.html @@ -5,4 +5,4 @@

Required Methods§

source

fn test(&mut self, op1: T, op2: U)

Emit a logical compare instruction.

Computes the bit-wise logical AND of first operand and the second operand and sets the SF, ZF, and PF status flags, the result is discarded.

-

Implementors§

source§

impl Test<MemOp, Imm16> for Asm

source§

impl Test<Reg32, Reg32> for Asm

source§

impl Test<Reg64, Reg64> for Asm

\ No newline at end of file +

Implementors§

source§

impl Test<Reg32, Reg32> for Asm

source§

impl Test<Reg64, Reg64> for Asm

source§

impl Test<Mem16, Imm16> for Asm

\ No newline at end of file diff --git a/juicebox_asm/mem/struct.Mem16.html b/juicebox_asm/mem/struct.Mem16.html new file mode 100644 index 0000000..28b0cff --- /dev/null +++ b/juicebox_asm/mem/struct.Mem16.html @@ -0,0 +1,11 @@ + + + + + Redirection + + +

Redirecting to ../../juicebox_asm/struct.Mem16.html...

+ + + \ No newline at end of file diff --git a/juicebox_asm/mem/struct.Mem32.html b/juicebox_asm/mem/struct.Mem32.html new file mode 100644 index 0000000..3acacea --- /dev/null +++ b/juicebox_asm/mem/struct.Mem32.html @@ -0,0 +1,11 @@ + + + + + Redirection + + +

Redirecting to ../../juicebox_asm/struct.Mem32.html...

+ + + \ No newline at end of file diff --git a/juicebox_asm/mem/struct.Mem64.html b/juicebox_asm/mem/struct.Mem64.html new file mode 100644 index 0000000..2141771 --- /dev/null +++ b/juicebox_asm/mem/struct.Mem64.html @@ -0,0 +1,11 @@ + + + + + Redirection + + +

Redirecting to ../../juicebox_asm/struct.Mem64.html...

+ + + \ No newline at end of file diff --git a/juicebox_asm/mem/struct.Mem8.html b/juicebox_asm/mem/struct.Mem8.html new file mode 100644 index 0000000..ba7cd47 --- /dev/null +++ b/juicebox_asm/mem/struct.Mem8.html @@ -0,0 +1,11 @@ + + + + + Redirection + + +

Redirecting to ../../juicebox_asm/struct.Mem8.html...

+ + + \ No newline at end of file diff --git a/juicebox_asm/sidebar-items.js b/juicebox_asm/sidebar-items.js index 2b71916..d2c96f1 100644 --- a/juicebox_asm/sidebar-items.js +++ b/juicebox_asm/sidebar-items.js @@ -1 +1 @@ -window.SIDEBAR_ITEMS = {"enum":["MemOp","Reg16","Reg32","Reg64","Reg8"],"mod":["insn"],"struct":["Asm","Imm16","Imm32","Imm64","Imm8","Label","MemOp16","MemOp32","MemOp64","MemOp8","Runtime"]}; \ No newline at end of file +window.SIDEBAR_ITEMS = {"enum":["Reg16","Reg32","Reg64","Reg8"],"mod":["insn"],"struct":["Asm","Imm16","Imm32","Imm64","Imm8","Label","Mem16","Mem32","Mem64","Mem8","Runtime"]}; \ No newline at end of file diff --git a/juicebox_asm/struct.Asm.html b/juicebox_asm/struct.Asm.html index c859d63..0991a04 100644 --- a/juicebox_asm/struct.Asm.html +++ b/juicebox_asm/struct.Asm.html @@ -1,10 +1,10 @@ -Asm in juicebox_asm - Rust
juicebox_asm

Struct Asm

source 
pub struct Asm { /* private fields */ }
Expand description

x64 jit assembler.

-

Implementations§

source§

impl Asm

source

pub fn new() -> Asm

Create a new x64 jit assembler.

-
source

pub fn into_code(self) -> Vec<u8>

Consume the assembler and get the emitted code.

-
source

pub fn bind(&mut self, label: &mut Label)

Bind the Label to the current location.

+Asm in juicebox_asm - Rust
juicebox_asm

Struct Asm

source 
pub struct Asm { /* private fields */ }
Expand description

x64 jit assembler.

+

Implementations§

source§

impl Asm

source

pub fn new() -> Asm

Create a new x64 jit assembler.

+
source

pub fn into_code(self) -> Vec<u8>

Consume the assembler and get the emitted code.

+
source

pub fn bind(&mut self, label: &mut Label)

Bind the Label to the current location.

source§

impl Asm

source

pub fn nop(&mut self)

Emit a nop instruction.

source§

impl Asm

source

pub fn ret(&mut self)

Emit a ret instruction.

-

Trait Implementations§

source§

impl Add<MemOp, Imm16> for Asm

source§

fn add(&mut self, op1: MemOp, op2: Imm16)

Emit an add instruction.
source§

impl Add<MemOp, Imm8> for Asm

source§

fn add(&mut self, op1: MemOp, op2: Imm8)

Emit an add instruction.
source§

impl Add<MemOp, Reg16> for Asm

source§

fn add(&mut self, op1: MemOp, op2: Reg16)

Emit an add instruction.
source§

impl Add<MemOp, Reg64> for Asm

source§

fn add(&mut self, op1: MemOp, op2: Reg64)

Emit an add instruction.
source§

impl Add<Reg32, Reg32> for Asm

source§

fn add(&mut self, op1: Reg32, op2: Reg32)

Emit an add instruction.
source§

impl Add<Reg64, MemOp> for Asm

source§

fn add(&mut self, op1: Reg64, op2: MemOp)

Emit an add instruction.
source§

impl Add<Reg64, Reg64> for Asm

source§

fn add(&mut self, op1: Reg64, op2: Reg64)

Emit an add instruction.
source§

impl Call<Reg64> for Asm

source§

fn call(&mut self, op1: Reg64)

Emit a call instruction.
source§

impl Cmovnz<Reg64, Reg64> for Asm

source§

fn cmovnz(&mut self, op1: Reg64, op2: Reg64)

Emit a (conditional) move if not zero instruction. Read more
source§

impl Cmovz<Reg64, Reg64> for Asm

source§

fn cmovz(&mut self, op1: Reg64, op2: Reg64)

Emit a (conditional) move if zero instruction. Read more
source§

impl Cmp<MemOp, Imm16> for Asm

source§

fn cmp(&mut self, op1: MemOp, op2: Imm16)

Emit a compare instruction. Read more
source§

impl Cmp<MemOp, Imm8> for Asm

source§

fn cmp(&mut self, op1: MemOp, op2: Imm8)

Emit a compare instruction. Read more
source§

impl Dec<MemOp16> for Asm

source§

fn dec(&mut self, op1: MemOp16)

Emit a decrement instruction.
source§

impl Dec<MemOp32> for Asm

source§

fn dec(&mut self, op1: MemOp32)

Emit a decrement instruction.
source§

impl Dec<MemOp64> for Asm

source§

fn dec(&mut self, op1: MemOp64)

Emit a decrement instruction.
source§

impl Dec<MemOp8> for Asm

source§

fn dec(&mut self, op1: MemOp8)

Emit a decrement instruction.
source§

impl Dec<Reg32> for Asm

source§

fn dec(&mut self, op1: Reg32)

Emit a decrement instruction.
source§

impl Dec<Reg64> for Asm

source§

fn dec(&mut self, op1: Reg64)

Emit a decrement instruction.
source§

impl Inc<MemOp16> for Asm

source§

fn inc(&mut self, op1: MemOp16)

Emit a increment instruction.
source§

impl Inc<MemOp32> for Asm

source§

fn inc(&mut self, op1: MemOp32)

Emit a increment instruction.
source§

impl Inc<MemOp64> for Asm

source§

fn inc(&mut self, op1: MemOp64)

Emit a increment instruction.
source§

impl Inc<MemOp8> for Asm

source§

fn inc(&mut self, op1: MemOp8)

Emit a increment instruction.
source§

impl Inc<Reg32> for Asm

source§

fn inc(&mut self, op1: Reg32)

Emit a increment instruction.
source§

impl Inc<Reg64> for Asm

source§

fn inc(&mut self, op1: Reg64)

Emit a increment instruction.
source§

impl Jmp<&mut Label> for Asm

source§

fn jmp(&mut self, op1: &mut Label)

Emit an unconditional jump instruction.
source§

impl Jnz<&mut Label> for Asm

source§

fn jnz(&mut self, op1: &mut Label)

Emit a conditional jump if not zero instruction (ZF = 0).
source§

impl Jz<&mut Label> for Asm

source§

fn jz(&mut self, op1: &mut Label)

Emit a conditional jump if zero instruction (ZF = 1).
source§

impl Mov<MemOp, Imm16> for Asm

source§

fn mov(&mut self, op1: MemOp, op2: Imm16)

Emit an move instruction.
source§

impl Mov<MemOp, Reg16> for Asm

source§

fn mov(&mut self, op1: MemOp, op2: Reg16)

Emit an move instruction.
source§

impl Mov<MemOp, Reg32> for Asm

source§

fn mov(&mut self, op1: MemOp, op2: Reg32)

Emit an move instruction.
source§

impl Mov<MemOp, Reg64> for Asm

source§

fn mov(&mut self, op1: MemOp, op2: Reg64)

Emit an move instruction.
source§

impl Mov<MemOp, Reg8> for Asm

source§

fn mov(&mut self, op1: MemOp, op2: Reg8)

Emit an move instruction.
source§

impl Mov<Reg16, Imm16> for Asm

source§

fn mov(&mut self, op1: Reg16, op2: Imm16)

Emit an move instruction.
source§

impl Mov<Reg16, MemOp> for Asm

source§

fn mov(&mut self, op1: Reg16, op2: MemOp)

Emit an move instruction.
source§

impl Mov<Reg16, Reg16> for Asm

source§

fn mov(&mut self, op1: Reg16, op2: Reg16)

Emit an move instruction.
source§

impl Mov<Reg32, Imm32> for Asm

source§

fn mov(&mut self, op1: Reg32, op2: Imm32)

Emit an move instruction.
source§

impl Mov<Reg32, MemOp> for Asm

source§

fn mov(&mut self, op1: Reg32, op2: MemOp)

Emit an move instruction.
source§

impl Mov<Reg32, Reg32> for Asm

source§

fn mov(&mut self, op1: Reg32, op2: Reg32)

Emit an move instruction.
source§

impl Mov<Reg64, Imm64> for Asm

source§

fn mov(&mut self, op1: Reg64, op2: Imm64)

Emit an move instruction.
source§

impl Mov<Reg64, MemOp> for Asm

source§

fn mov(&mut self, op1: Reg64, op2: MemOp)

Emit an move instruction.
source§

impl Mov<Reg64, Reg64> for Asm

source§

fn mov(&mut self, op1: Reg64, op2: Reg64)

Emit an move instruction.
source§

impl Mov<Reg8, Imm8> for Asm

source§

fn mov(&mut self, op1: Reg8, op2: Imm8)

Emit an move instruction.
source§

impl Mov<Reg8, MemOp> for Asm

source§

fn mov(&mut self, op1: Reg8, op2: MemOp)

Emit an move instruction.
source§

impl Mov<Reg8, Reg8> for Asm

source§

fn mov(&mut self, op1: Reg8, op2: Reg8)

Emit an move instruction.
source§

impl Pop<Reg16> for Asm

source§

fn pop(&mut self, op1: Reg16)

Emit a pop instruction.
source§

impl Pop<Reg64> for Asm

source§

fn pop(&mut self, op1: Reg64)

Emit a pop instruction.
source§

impl Push<Reg16> for Asm

source§

fn push(&mut self, op1: Reg16)

Emit a push instruction.
source§

impl Push<Reg64> for Asm

source§

fn push(&mut self, op1: Reg64)

Emit a push instruction.
source§

impl Sub<MemOp, Imm8> for Asm

source§

fn sub(&mut self, op1: MemOp, op2: Imm8)

Emit an sub instruction.
source§

impl Sub<Reg64, Reg64> for Asm

source§

fn sub(&mut self, op1: Reg64, op2: Reg64)

Emit an sub instruction.
source§

impl Test<MemOp, Imm16> for Asm

source§

fn test(&mut self, op1: MemOp, op2: Imm16)

Emit a logical compare instruction. Read more
source§

impl Test<Reg32, Reg32> for Asm

source§

fn test(&mut self, op1: Reg32, op2: Reg32)

Emit a logical compare instruction. Read more
source§

impl Test<Reg64, Reg64> for Asm

source§

fn test(&mut self, op1: Reg64, op2: Reg64)

Emit a logical compare instruction. Read more
source§

impl Xor<Reg64, Reg64> for Asm

source§

fn xor(&mut self, op1: Reg64, op2: Reg64)

Emit a xor instruction.

Auto Trait Implementations§

§

impl Freeze for Asm

§

impl RefUnwindSafe for Asm

§

impl Send for Asm

§

impl Sync for Asm

§

impl Unpin for Asm

§

impl UnwindSafe for Asm

Blanket Implementations§

source§

impl<T> Any for T
where +

Trait Implementations§

source§

impl Add<Mem16, Imm16> for Asm

source§

fn add(&mut self, op1: Mem16, op2: Imm16)

Emit an add instruction.
source§

impl Add<Mem16, Imm8> for Asm

source§

fn add(&mut self, op1: Mem16, op2: Imm8)

Emit an add instruction.
source§

impl Add<Mem16, Reg16> for Asm

source§

fn add(&mut self, op1: Mem16, op2: Reg16)

Emit an add instruction.
source§

impl Add<Mem32, Imm8> for Asm

source§

fn add(&mut self, op1: Mem32, op2: Imm8)

Emit an add instruction.
source§

impl Add<Mem64, Imm8> for Asm

source§

fn add(&mut self, op1: Mem64, op2: Imm8)

Emit an add instruction.
source§

impl Add<Mem64, Reg64> for Asm

source§

fn add(&mut self, op1: Mem64, op2: Reg64)

Emit an add instruction.
source§

impl Add<Mem8, Imm8> for Asm

source§

fn add(&mut self, op1: Mem8, op2: Imm8)

Emit an add instruction.
source§

impl Add<Reg32, Reg32> for Asm

source§

fn add(&mut self, op1: Reg32, op2: Reg32)

Emit an add instruction.
source§

impl Add<Reg64, Mem64> for Asm

source§

fn add(&mut self, op1: Reg64, op2: Mem64)

Emit an add instruction.
source§

impl Add<Reg64, Reg64> for Asm

source§

fn add(&mut self, op1: Reg64, op2: Reg64)

Emit an add instruction.
source§

impl Call<Reg64> for Asm

source§

fn call(&mut self, op1: Reg64)

Emit a call instruction.
source§

impl Cmovnz<Reg64, Reg64> for Asm

source§

fn cmovnz(&mut self, op1: Reg64, op2: Reg64)

Emit a (conditional) move if not zero instruction. Read more
source§

impl Cmovz<Reg64, Reg64> for Asm

source§

fn cmovz(&mut self, op1: Reg64, op2: Reg64)

Emit a (conditional) move if zero instruction. Read more
source§

impl Cmp<Mem16, Imm16> for Asm

source§

fn cmp(&mut self, op1: Mem16, op2: Imm16)

Emit a compare instruction. Read more
source§

impl Cmp<Mem8, Imm8> for Asm

source§

fn cmp(&mut self, op1: Mem8, op2: Imm8)

Emit a compare instruction. Read more
source§

impl Dec<Mem16> for Asm

source§

fn dec(&mut self, op1: Mem16)

Emit a decrement instruction.
source§

impl Dec<Mem32> for Asm

source§

fn dec(&mut self, op1: Mem32)

Emit a decrement instruction.
source§

impl Dec<Mem64> for Asm

source§

fn dec(&mut self, op1: Mem64)

Emit a decrement instruction.
source§

impl Dec<Mem8> for Asm

source§

fn dec(&mut self, op1: Mem8)

Emit a decrement instruction.
source§

impl Dec<Reg32> for Asm

source§

fn dec(&mut self, op1: Reg32)

Emit a decrement instruction.
source§

impl Dec<Reg64> for Asm

source§

fn dec(&mut self, op1: Reg64)

Emit a decrement instruction.
source§

impl Inc<Mem16> for Asm

source§

fn inc(&mut self, op1: Mem16)

Emit a increment instruction.
source§

impl Inc<Mem32> for Asm

source§

fn inc(&mut self, op1: Mem32)

Emit a increment instruction.
source§

impl Inc<Mem64> for Asm

source§

fn inc(&mut self, op1: Mem64)

Emit a increment instruction.
source§

impl Inc<Mem8> for Asm

source§

fn inc(&mut self, op1: Mem8)

Emit a increment instruction.
source§

impl Inc<Reg32> for Asm

source§

fn inc(&mut self, op1: Reg32)

Emit a increment instruction.
source§

impl Inc<Reg64> for Asm

source§

fn inc(&mut self, op1: Reg64)

Emit a increment instruction.
source§

impl Jmp<&mut Label> for Asm

source§

fn jmp(&mut self, op1: &mut Label)

Emit an unconditional jump instruction.
source§

impl Jnz<&mut Label> for Asm

source§

fn jnz(&mut self, op1: &mut Label)

Emit a conditional jump if not zero instruction (ZF = 0).
source§

impl Jz<&mut Label> for Asm

source§

fn jz(&mut self, op1: &mut Label)

Emit a conditional jump if zero instruction (ZF = 1).
source§

impl Mov<Mem16, Imm16> for Asm

source§

fn mov(&mut self, op1: Mem16, op2: Imm16)

Emit an move instruction.
source§

impl Mov<Mem16, Reg16> for Asm

source§

fn mov(&mut self, op1: Mem16, op2: Reg16)

Emit an move instruction.
source§

impl Mov<Mem32, Reg32> for Asm

source§

fn mov(&mut self, op1: Mem32, op2: Reg32)

Emit an move instruction.
source§

impl Mov<Mem64, Reg64> for Asm

source§

fn mov(&mut self, op1: Mem64, op2: Reg64)

Emit an move instruction.
source§

impl Mov<Mem8, Reg8> for Asm

source§

fn mov(&mut self, op1: Mem8, op2: Reg8)

Emit an move instruction.
source§

impl Mov<Reg16, Imm16> for Asm

source§

fn mov(&mut self, op1: Reg16, op2: Imm16)

Emit an move instruction.
source§

impl Mov<Reg16, Mem16> for Asm

source§

fn mov(&mut self, op1: Reg16, op2: Mem16)

Emit an move instruction.
source§

impl Mov<Reg16, Reg16> for Asm

source§

fn mov(&mut self, op1: Reg16, op2: Reg16)

Emit an move instruction.
source§

impl Mov<Reg32, Imm32> for Asm

source§

fn mov(&mut self, op1: Reg32, op2: Imm32)

Emit an move instruction.
source§

impl Mov<Reg32, Mem32> for Asm

source§

fn mov(&mut self, op1: Reg32, op2: Mem32)

Emit an move instruction.
source§

impl Mov<Reg32, Reg32> for Asm

source§

fn mov(&mut self, op1: Reg32, op2: Reg32)

Emit an move instruction.
source§

impl Mov<Reg64, Imm64> for Asm

source§

fn mov(&mut self, op1: Reg64, op2: Imm64)

Emit an move instruction.
source§

impl Mov<Reg64, Mem64> for Asm

source§

fn mov(&mut self, op1: Reg64, op2: Mem64)

Emit an move instruction.
source§

impl Mov<Reg64, Reg64> for Asm

source§

fn mov(&mut self, op1: Reg64, op2: Reg64)

Emit an move instruction.
source§

impl Mov<Reg8, Imm8> for Asm

source§

fn mov(&mut self, op1: Reg8, op2: Imm8)

Emit an move instruction.
source§

impl Mov<Reg8, Mem8> for Asm

source§

fn mov(&mut self, op1: Reg8, op2: Mem8)

Emit an move instruction.
source§

impl Mov<Reg8, Reg8> for Asm

source§

fn mov(&mut self, op1: Reg8, op2: Reg8)

Emit an move instruction.
source§

impl Pop<Reg16> for Asm

source§

fn pop(&mut self, op1: Reg16)

Emit a pop instruction.
source§

impl Pop<Reg64> for Asm

source§

fn pop(&mut self, op1: Reg64)

Emit a pop instruction.
source§

impl Push<Reg16> for Asm

source§

fn push(&mut self, op1: Reg16)

Emit a push instruction.
source§

impl Push<Reg64> for Asm

source§

fn push(&mut self, op1: Reg64)

Emit a push instruction.
source§

impl Sub<Mem8, Imm8> for Asm

source§

fn sub(&mut self, op1: Mem8, op2: Imm8)

Emit an sub instruction.
source§

impl Sub<Reg64, Reg64> for Asm

source§

fn sub(&mut self, op1: Reg64, op2: Reg64)

Emit an sub instruction.
source§

impl Test<Mem16, Imm16> for Asm

source§

fn test(&mut self, op1: Mem16, op2: Imm16)

Emit a logical compare instruction. Read more
source§

impl Test<Reg32, Reg32> for Asm

source§

fn test(&mut self, op1: Reg32, op2: Reg32)

Emit a logical compare instruction. Read more
source§

impl Test<Reg64, Reg64> for Asm

source§

fn test(&mut self, op1: Reg64, op2: Reg64)

Emit a logical compare instruction. Read more
source§

impl Xor<Reg64, Reg64> for Asm

source§

fn xor(&mut self, op1: Reg64, op2: Reg64)

Emit a xor instruction.

Auto Trait Implementations§

§

impl Freeze for Asm

§

impl RefUnwindSafe for Asm

§

impl Send for Asm

§

impl Sync for Asm

§

impl Unpin for Asm

§

impl UnwindSafe for Asm

Blanket Implementations§

source§

impl<T> Any for T
where T: 'static + ?Sized,

source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
source§

impl<T> Borrow<T> for T
where T: ?Sized,

source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
source§

impl<T> BorrowMut<T> for T
where T: ?Sized,

source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
source§

impl<T> From<T> for T

source§

fn from(t: T) -> T

Returns the argument unchanged.

diff --git a/juicebox_asm/struct.Imm16.html b/juicebox_asm/struct.Imm16.html index 3cd2347..b25d7c0 100644 --- a/juicebox_asm/struct.Imm16.html +++ b/juicebox_asm/struct.Imm16.html @@ -1,5 +1,5 @@ -Imm16 in juicebox_asm - Rust
juicebox_asm

Struct Imm16

source 
pub struct Imm16(/* private fields */);
Expand description

Type representing a 16 bit immediate.

-

Trait Implementations§

source§

impl Add<MemOp, Imm16> for Asm

source§

fn add(&mut self, op1: MemOp, op2: Imm16)

Emit an add instruction.
source§

impl Cmp<MemOp, Imm16> for Asm

source§

fn cmp(&mut self, op1: MemOp, op2: Imm16)

Emit a compare instruction. Read more
source§

impl From<i16> for Imm16

source§

fn from(imm: i16) -> Self

Converts to this type from the input type.
source§

impl From<i8> for Imm16

source§

fn from(imm: i8) -> Self

Converts to this type from the input type.
source§

impl From<u16> for Imm16

source§

fn from(imm: u16) -> Self

Converts to this type from the input type.
source§

impl From<u8> for Imm16

source§

fn from(imm: u8) -> Self

Converts to this type from the input type.
source§

impl Mov<MemOp, Imm16> for Asm

source§

fn mov(&mut self, op1: MemOp, op2: Imm16)

Emit an move instruction.
source§

impl Mov<Reg16, Imm16> for Asm

source§

fn mov(&mut self, op1: Reg16, op2: Imm16)

Emit an move instruction.
source§

impl Test<MemOp, Imm16> for Asm

source§

fn test(&mut self, op1: MemOp, op2: Imm16)

Emit a logical compare instruction. Read more

Auto Trait Implementations§

§

impl Freeze for Imm16

§

impl RefUnwindSafe for Imm16

§

impl Send for Imm16

§

impl Sync for Imm16

§

impl Unpin for Imm16

§

impl UnwindSafe for Imm16

Blanket Implementations§

source§

impl<T> Any for T
where +Imm16 in juicebox_asm - Rust
juicebox_asm

Struct Imm16

source 
pub struct Imm16(/* private fields */);
Expand description

Type representing a 16 bit immediate.

+

Trait Implementations§

source§

impl Add<Mem16, Imm16> for Asm

source§

fn add(&mut self, op1: Mem16, op2: Imm16)

Emit an add instruction.
source§

impl Cmp<Mem16, Imm16> for Asm

source§

fn cmp(&mut self, op1: Mem16, op2: Imm16)

Emit a compare instruction. Read more
source§

impl From<i16> for Imm16

source§

fn from(imm: i16) -> Self

Converts to this type from the input type.
source§

impl From<i8> for Imm16

source§

fn from(imm: i8) -> Self

Converts to this type from the input type.
source§

impl From<u16> for Imm16

source§

fn from(imm: u16) -> Self

Converts to this type from the input type.
source§

impl From<u8> for Imm16

source§

fn from(imm: u8) -> Self

Converts to this type from the input type.
source§

impl Mov<Mem16, Imm16> for Asm

source§

fn mov(&mut self, op1: Mem16, op2: Imm16)

Emit an move instruction.
source§

impl Mov<Reg16, Imm16> for Asm

source§

fn mov(&mut self, op1: Reg16, op2: Imm16)

Emit an move instruction.
source§

impl Test<Mem16, Imm16> for Asm

source§

fn test(&mut self, op1: Mem16, op2: Imm16)

Emit a logical compare instruction. Read more

Auto Trait Implementations§

§

impl Freeze for Imm16

§

impl RefUnwindSafe for Imm16

§

impl Send for Imm16

§

impl Sync for Imm16

§

impl Unpin for Imm16

§

impl UnwindSafe for Imm16

Blanket Implementations§

source§

impl<T> Any for T
where T: 'static + ?Sized,

source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
source§

impl<T> Borrow<T> for T
where T: ?Sized,

source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
source§

impl<T> BorrowMut<T> for T
where T: ?Sized,

source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
source§

impl<T> From<T> for T

source§

fn from(t: T) -> T

Returns the argument unchanged.

diff --git a/juicebox_asm/struct.Imm8.html b/juicebox_asm/struct.Imm8.html index cf81cbe..95d9b6a 100644 --- a/juicebox_asm/struct.Imm8.html +++ b/juicebox_asm/struct.Imm8.html @@ -1,5 +1,5 @@ -Imm8 in juicebox_asm - Rust
juicebox_asm

Struct Imm8

source 
pub struct Imm8(/* private fields */);
Expand description

Type representing an 8 bit immediate.

-

Trait Implementations§

source§

impl Add<MemOp, Imm8> for Asm

source§

fn add(&mut self, op1: MemOp, op2: Imm8)

Emit an add instruction.
source§

impl Cmp<MemOp, Imm8> for Asm

source§

fn cmp(&mut self, op1: MemOp, op2: Imm8)

Emit a compare instruction. Read more
source§

impl From<i8> for Imm8

source§

fn from(imm: i8) -> Self

Converts to this type from the input type.
source§

impl From<u8> for Imm8

source§

fn from(imm: u8) -> Self

Converts to this type from the input type.
source§

impl Mov<Reg8, Imm8> for Asm

source§

fn mov(&mut self, op1: Reg8, op2: Imm8)

Emit an move instruction.
source§

impl Sub<MemOp, Imm8> for Asm

source§

fn sub(&mut self, op1: MemOp, op2: Imm8)

Emit an sub instruction.

Auto Trait Implementations§

§

impl Freeze for Imm8

§

impl RefUnwindSafe for Imm8

§

impl Send for Imm8

§

impl Sync for Imm8

§

impl Unpin for Imm8

§

impl UnwindSafe for Imm8

Blanket Implementations§

source§

impl<T> Any for T
where +Imm8 in juicebox_asm - Rust
juicebox_asm

Struct Imm8

source 
pub struct Imm8(/* private fields */);
Expand description

Type representing an 8 bit immediate.

+

Trait Implementations§

source§

impl Add<Mem16, Imm8> for Asm

source§

fn add(&mut self, op1: Mem16, op2: Imm8)

Emit an add instruction.
source§

impl Add<Mem32, Imm8> for Asm

source§

fn add(&mut self, op1: Mem32, op2: Imm8)

Emit an add instruction.
source§

impl Add<Mem64, Imm8> for Asm

source§

fn add(&mut self, op1: Mem64, op2: Imm8)

Emit an add instruction.
source§

impl Add<Mem8, Imm8> for Asm

source§

fn add(&mut self, op1: Mem8, op2: Imm8)

Emit an add instruction.
source§

impl Cmp<Mem8, Imm8> for Asm

source§

fn cmp(&mut self, op1: Mem8, op2: Imm8)

Emit a compare instruction. Read more
source§

impl From<i8> for Imm8

source§

fn from(imm: i8) -> Self

Converts to this type from the input type.
source§

impl From<u8> for Imm8

source§

fn from(imm: u8) -> Self

Converts to this type from the input type.
source§

impl Mov<Reg8, Imm8> for Asm

source§

fn mov(&mut self, op1: Reg8, op2: Imm8)

Emit an move instruction.
source§

impl Sub<Mem8, Imm8> for Asm

source§

fn sub(&mut self, op1: Mem8, op2: Imm8)

Emit an sub instruction.

Auto Trait Implementations§

§

impl Freeze for Imm8

§

impl RefUnwindSafe for Imm8

§

impl Send for Imm8

§

impl Sync for Imm8

§

impl Unpin for Imm8

§

impl UnwindSafe for Imm8

Blanket Implementations§

source§

impl<T> Any for T
where T: 'static + ?Sized,

source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
source§

impl<T> Borrow<T> for T
where T: ?Sized,

source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
source§

impl<T> BorrowMut<T> for T
where T: ?Sized,

source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
source§

impl<T> From<T> for T

source§

fn from(t: T) -> T

Returns the argument unchanged.

diff --git a/juicebox_asm/struct.Mem16.html b/juicebox_asm/struct.Mem16.html new file mode 100644 index 0000000..bd09053 --- /dev/null +++ b/juicebox_asm/struct.Mem16.html @@ -0,0 +1,19 @@ +Mem16 in juicebox_asm - Rust
juicebox_asm

Struct Mem16

source 
pub struct Mem16 { /* private fields */ }
Expand description

A memory operand with word size (16 bit).

+

Implementations§

source§

impl Mem16

source

pub fn indirect(base: Reg64) -> Self

Create a memory operand with indirect addressing mode. +For example mov [rax], rcx.

+
source

pub fn indirect_disp(base: Reg64, disp: i32) -> Self

Create a memory operand with indirect + displacement +addressing mode. +For example mov [rax + 0x10], rcx.

+
source

pub fn indirect_base_index(base: Reg64, index: Reg64) -> Self

Create a memory operand with base + index addressing mode. +For example mov [rax + rcx], rdx.

+

Trait Implementations§

source§

impl Add<Mem16, Imm16> for Asm

source§

fn add(&mut self, op1: Mem16, op2: Imm16)

Emit an add instruction.
source§

impl Add<Mem16, Imm8> for Asm

source§

fn add(&mut self, op1: Mem16, op2: Imm8)

Emit an add instruction.
source§

impl Add<Mem16, Reg16> for Asm

source§

fn add(&mut self, op1: Mem16, op2: Reg16)

Emit an add instruction.
source§

impl Cmp<Mem16, Imm16> for Asm

source§

fn cmp(&mut self, op1: Mem16, op2: Imm16)

Emit a compare instruction. Read more
source§

impl Dec<Mem16> for Asm

source§

fn dec(&mut self, op1: Mem16)

Emit a decrement instruction.
source§

impl Inc<Mem16> for Asm

source§

fn inc(&mut self, op1: Mem16)

Emit a increment instruction.
source§

impl Mov<Mem16, Imm16> for Asm

source§

fn mov(&mut self, op1: Mem16, op2: Imm16)

Emit an move instruction.
source§

impl Mov<Mem16, Reg16> for Asm

source§

fn mov(&mut self, op1: Mem16, op2: Reg16)

Emit an move instruction.
source§

impl Mov<Reg16, Mem16> for Asm

source§

fn mov(&mut self, op1: Reg16, op2: Mem16)

Emit an move instruction.
source§

impl Test<Mem16, Imm16> for Asm

source§

fn test(&mut self, op1: Mem16, op2: Imm16)

Emit a logical compare instruction. Read more

Auto Trait Implementations§

§

impl Freeze for Mem16

§

impl RefUnwindSafe for Mem16

§

impl Send for Mem16

§

impl Sync for Mem16

§

impl Unpin for Mem16

§

impl UnwindSafe for Mem16

Blanket Implementations§

source§

impl<T> Any for T
where + T: 'static + ?Sized,

source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
source§

impl<T> Borrow<T> for T
where + T: ?Sized,

source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
source§

impl<T> BorrowMut<T> for T
where + T: ?Sized,

source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
source§

impl<T> From<T> for T

source§

fn from(t: T) -> T

Returns the argument unchanged.

+
source§

impl<T, U> Into<U> for T
where + U: From<T>,

source§

fn into(self) -> U

Calls U::from(self).

+

That is, this conversion is whatever the implementation of +From<T> for U chooses to do.

+
source§

impl<T, U> TryFrom<U> for T
where + U: Into<T>,

source§

type Error = Infallible

The type returned in the event of a conversion error.
source§

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
source§

impl<T, U> TryInto<U> for T
where + U: TryFrom<T>,

source§

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
source§

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.
\ No newline at end of file diff --git a/juicebox_asm/struct.Mem32.html b/juicebox_asm/struct.Mem32.html new file mode 100644 index 0000000..7409029 --- /dev/null +++ b/juicebox_asm/struct.Mem32.html @@ -0,0 +1,19 @@ +Mem32 in juicebox_asm - Rust
juicebox_asm

Struct Mem32

source 
pub struct Mem32 { /* private fields */ }
Expand description

A memory operand with dword size (32 bit).

+

Implementations§

source§

impl Mem32

source

pub fn indirect(base: Reg64) -> Self

Create a memory operand with indirect addressing mode. +For example mov [rax], rcx.

+
source

pub fn indirect_disp(base: Reg64, disp: i32) -> Self

Create a memory operand with indirect + displacement +addressing mode. +For example mov [rax + 0x10], rcx.

+
source

pub fn indirect_base_index(base: Reg64, index: Reg64) -> Self

Create a memory operand with base + index addressing mode. +For example mov [rax + rcx], rdx.

+

Trait Implementations§

source§

impl Add<Mem32, Imm8> for Asm

source§

fn add(&mut self, op1: Mem32, op2: Imm8)

Emit an add instruction.
source§

impl Dec<Mem32> for Asm

source§

fn dec(&mut self, op1: Mem32)

Emit a decrement instruction.
source§

impl Inc<Mem32> for Asm

source§

fn inc(&mut self, op1: Mem32)

Emit a increment instruction.
source§

impl Mov<Mem32, Reg32> for Asm

source§

fn mov(&mut self, op1: Mem32, op2: Reg32)

Emit an move instruction.
source§

impl Mov<Reg32, Mem32> for Asm

source§

fn mov(&mut self, op1: Reg32, op2: Mem32)

Emit an move instruction.

Auto Trait Implementations§

§

impl Freeze for Mem32

§

impl RefUnwindSafe for Mem32

§

impl Send for Mem32

§

impl Sync for Mem32

§

impl Unpin for Mem32

§

impl UnwindSafe for Mem32

Blanket Implementations§

source§

impl<T> Any for T
where + T: 'static + ?Sized,

source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
source§

impl<T> Borrow<T> for T
where + T: ?Sized,

source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
source§

impl<T> BorrowMut<T> for T
where + T: ?Sized,

source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
source§

impl<T> From<T> for T

source§

fn from(t: T) -> T

Returns the argument unchanged.

+
source§

impl<T, U> Into<U> for T
where + U: From<T>,

source§

fn into(self) -> U

Calls U::from(self).

+

That is, this conversion is whatever the implementation of +From<T> for U chooses to do.

+
source§

impl<T, U> TryFrom<U> for T
where + U: Into<T>,

source§

type Error = Infallible

The type returned in the event of a conversion error.
source§

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
source§

impl<T, U> TryInto<U> for T
where + U: TryFrom<T>,

source§

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
source§

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.
\ No newline at end of file diff --git a/juicebox_asm/struct.Mem64.html b/juicebox_asm/struct.Mem64.html new file mode 100644 index 0000000..c213af2 --- /dev/null +++ b/juicebox_asm/struct.Mem64.html @@ -0,0 +1,19 @@ +Mem64 in juicebox_asm - Rust
juicebox_asm

Struct Mem64

source 
pub struct Mem64 { /* private fields */ }
Expand description

A memory operand with qword size (64 bit).

+

Implementations§

source§

impl Mem64

source

pub fn indirect(base: Reg64) -> Self

Create a memory operand with indirect addressing mode. +For example mov [rax], rcx.

+
source

pub fn indirect_disp(base: Reg64, disp: i32) -> Self

Create a memory operand with indirect + displacement +addressing mode. +For example mov [rax + 0x10], rcx.

+
source

pub fn indirect_base_index(base: Reg64, index: Reg64) -> Self

Create a memory operand with base + index addressing mode. +For example mov [rax + rcx], rdx.

+

Trait Implementations§

source§

impl Add<Mem64, Imm8> for Asm

source§

fn add(&mut self, op1: Mem64, op2: Imm8)

Emit an add instruction.
source§

impl Add<Mem64, Reg64> for Asm

source§

fn add(&mut self, op1: Mem64, op2: Reg64)

Emit an add instruction.
source§

impl Add<Reg64, Mem64> for Asm

source§

fn add(&mut self, op1: Reg64, op2: Mem64)

Emit an add instruction.
source§

impl Dec<Mem64> for Asm

source§

fn dec(&mut self, op1: Mem64)

Emit a decrement instruction.
source§

impl Inc<Mem64> for Asm

source§

fn inc(&mut self, op1: Mem64)

Emit a increment instruction.
source§

impl Mov<Mem64, Reg64> for Asm

source§

fn mov(&mut self, op1: Mem64, op2: Reg64)

Emit an move instruction.
source§

impl Mov<Reg64, Mem64> for Asm

source§

fn mov(&mut self, op1: Reg64, op2: Mem64)

Emit an move instruction.

Auto Trait Implementations§

§

impl Freeze for Mem64

§

impl RefUnwindSafe for Mem64

§

impl Send for Mem64

§

impl Sync for Mem64

§

impl Unpin for Mem64

§

impl UnwindSafe for Mem64

Blanket Implementations§

source§

impl<T> Any for T
where + T: 'static + ?Sized,

source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
source§

impl<T> Borrow<T> for T
where + T: ?Sized,

source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
source§

impl<T> BorrowMut<T> for T
where + T: ?Sized,

source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
source§

impl<T> From<T> for T

source§

fn from(t: T) -> T

Returns the argument unchanged.

+
source§

impl<T, U> Into<U> for T
where + U: From<T>,

source§

fn into(self) -> U

Calls U::from(self).

+

That is, this conversion is whatever the implementation of +From<T> for U chooses to do.

+
source§

impl<T, U> TryFrom<U> for T
where + U: Into<T>,

source§

type Error = Infallible

The type returned in the event of a conversion error.
source§

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
source§

impl<T, U> TryInto<U> for T
where + U: TryFrom<T>,

source§

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
source§

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.
\ No newline at end of file diff --git a/juicebox_asm/struct.Mem8.html b/juicebox_asm/struct.Mem8.html new file mode 100644 index 0000000..df36631 --- /dev/null +++ b/juicebox_asm/struct.Mem8.html @@ -0,0 +1,19 @@ +Mem8 in juicebox_asm - Rust
juicebox_asm

Struct Mem8

source 
pub struct Mem8 { /* private fields */ }
Expand description

A memory operand with byte size (8 bit).

+

Implementations§

source§

impl Mem8

source

pub fn indirect(base: Reg64) -> Self

Create a memory operand with indirect addressing mode. +For example mov [rax], rcx.

+
source

pub fn indirect_disp(base: Reg64, disp: i32) -> Self

Create a memory operand with indirect + displacement +addressing mode. +For example mov [rax + 0x10], rcx.

+
source

pub fn indirect_base_index(base: Reg64, index: Reg64) -> Self

Create a memory operand with base + index addressing mode. +For example mov [rax + rcx], rdx.

+

Trait Implementations§

source§

impl Add<Mem8, Imm8> for Asm

source§

fn add(&mut self, op1: Mem8, op2: Imm8)

Emit an add instruction.
source§

impl Cmp<Mem8, Imm8> for Asm

source§

fn cmp(&mut self, op1: Mem8, op2: Imm8)

Emit a compare instruction. Read more
source§

impl Dec<Mem8> for Asm

source§

fn dec(&mut self, op1: Mem8)

Emit a decrement instruction.
source§

impl Inc<Mem8> for Asm

source§

fn inc(&mut self, op1: Mem8)

Emit a increment instruction.
source§

impl Mov<Mem8, Reg8> for Asm

source§

fn mov(&mut self, op1: Mem8, op2: Reg8)

Emit an move instruction.
source§

impl Mov<Reg8, Mem8> for Asm

source§

fn mov(&mut self, op1: Reg8, op2: Mem8)

Emit an move instruction.
source§

impl Sub<Mem8, Imm8> for Asm

source§

fn sub(&mut self, op1: Mem8, op2: Imm8)

Emit an sub instruction.

Auto Trait Implementations§

§

impl Freeze for Mem8

§

impl RefUnwindSafe for Mem8

§

impl Send for Mem8

§

impl Sync for Mem8

§

impl Unpin for Mem8

§

impl UnwindSafe for Mem8

Blanket Implementations§

source§

impl<T> Any for T
where + T: 'static + ?Sized,

source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
source§

impl<T> Borrow<T> for T
where + T: ?Sized,

source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
source§

impl<T> BorrowMut<T> for T
where + T: ?Sized,

source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
source§

impl<T> From<T> for T

source§

fn from(t: T) -> T

Returns the argument unchanged.

+
source§

impl<T, U> Into<U> for T
where + U: From<T>,

source§

fn into(self) -> U

Calls U::from(self).

+

That is, this conversion is whatever the implementation of +From<T> for U chooses to do.

+
source§

impl<T, U> TryFrom<U> for T
where + U: Into<T>,

source§

type Error = Infallible

The type returned in the event of a conversion error.
source§

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
source§

impl<T, U> TryInto<U> for T
where + U: TryFrom<T>,

source§

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
source§

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.
\ No newline at end of file diff --git a/juicebox_asm/struct.MemOp16.html b/juicebox_asm/struct.MemOp16.html deleted file mode 100644 index f746c9e..0000000 --- a/juicebox_asm/struct.MemOp16.html +++ /dev/null @@ -1,13 +0,0 @@ -MemOp16 in juicebox_asm - Rust
juicebox_asm

Struct MemOp16

source 
pub struct MemOp16(/* private fields */);
Expand description

A memory operand with a word (16 bit) size hint.

-

Implementations§

source§

impl MemOp16

source

pub fn from(op: MemOp) -> Self

Create a memory with size hint from a raw memory operand.

-

Trait Implementations§

source§

impl Dec<MemOp16> for Asm

source§

fn dec(&mut self, op1: MemOp16)

Emit a decrement instruction.
source§

impl Inc<MemOp16> for Asm

source§

fn inc(&mut self, op1: MemOp16)

Emit a increment instruction.

Auto Trait Implementations§

Blanket Implementations§

source§

impl<T> Any for T
where - T: 'static + ?Sized,

source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
source§

impl<T> Borrow<T> for T
where - T: ?Sized,

source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
source§

impl<T> BorrowMut<T> for T
where - T: ?Sized,

source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
source§

impl<T> From<T> for T

source§

fn from(t: T) -> T

Returns the argument unchanged.

-
source§

impl<T, U> Into<U> for T
where - U: From<T>,

source§

fn into(self) -> U

Calls U::from(self).

-

That is, this conversion is whatever the implementation of -From<T> for U chooses to do.

-
source§

impl<T, U> TryFrom<U> for T
where - U: Into<T>,

source§

type Error = Infallible

The type returned in the event of a conversion error.
source§

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
source§

impl<T, U> TryInto<U> for T
where - U: TryFrom<T>,

source§

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
source§

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.
\ No newline at end of file diff --git a/juicebox_asm/struct.MemOp32.html b/juicebox_asm/struct.MemOp32.html deleted file mode 100644 index f47507a..0000000 --- a/juicebox_asm/struct.MemOp32.html +++ /dev/null @@ -1,13 +0,0 @@ -MemOp32 in juicebox_asm - Rust
juicebox_asm

Struct MemOp32

source 
pub struct MemOp32(/* private fields */);
Expand description

A memory operand with a dword (32 bit) size hint.

-

Implementations§

source§

impl MemOp32

source

pub fn from(op: MemOp) -> Self

Create a memory with size hint from a raw memory operand.

-

Trait Implementations§

source§

impl Dec<MemOp32> for Asm

source§

fn dec(&mut self, op1: MemOp32)

Emit a decrement instruction.
source§

impl Inc<MemOp32> for Asm

source§

fn inc(&mut self, op1: MemOp32)

Emit a increment instruction.

Auto Trait Implementations§

Blanket Implementations§

source§

impl<T> Any for T
where - T: 'static + ?Sized,

source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
source§

impl<T> Borrow<T> for T
where - T: ?Sized,

source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
source§

impl<T> BorrowMut<T> for T
where - T: ?Sized,

source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
source§

impl<T> From<T> for T

source§

fn from(t: T) -> T

Returns the argument unchanged.

-
source§

impl<T, U> Into<U> for T
where - U: From<T>,

source§

fn into(self) -> U

Calls U::from(self).

-

That is, this conversion is whatever the implementation of -From<T> for U chooses to do.

-
source§

impl<T, U> TryFrom<U> for T
where - U: Into<T>,

source§

type Error = Infallible

The type returned in the event of a conversion error.
source§

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
source§

impl<T, U> TryInto<U> for T
where - U: TryFrom<T>,

source§

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
source§

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.
\ No newline at end of file diff --git a/juicebox_asm/struct.MemOp64.html b/juicebox_asm/struct.MemOp64.html deleted file mode 100644 index 05ade14..0000000 --- a/juicebox_asm/struct.MemOp64.html +++ /dev/null @@ -1,13 +0,0 @@ -MemOp64 in juicebox_asm - Rust
juicebox_asm

Struct MemOp64

source 
pub struct MemOp64(/* private fields */);
Expand description

A memory operand with a qword (64 bit) size hint.

-

Implementations§

source§

impl MemOp64

source

pub fn from(op: MemOp) -> Self

Create a memory with size hint from a raw memory operand.

-

Trait Implementations§

source§

impl Dec<MemOp64> for Asm

source§

fn dec(&mut self, op1: MemOp64)

Emit a decrement instruction.
source§

impl Inc<MemOp64> for Asm

source§

fn inc(&mut self, op1: MemOp64)

Emit a increment instruction.

Auto Trait Implementations§

Blanket Implementations§

source§

impl<T> Any for T
where - T: 'static + ?Sized,

source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
source§

impl<T> Borrow<T> for T
where - T: ?Sized,

source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
source§

impl<T> BorrowMut<T> for T
where - T: ?Sized,

source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
source§

impl<T> From<T> for T

source§

fn from(t: T) -> T

Returns the argument unchanged.

-
source§

impl<T, U> Into<U> for T
where - U: From<T>,

source§

fn into(self) -> U

Calls U::from(self).

-

That is, this conversion is whatever the implementation of -From<T> for U chooses to do.

-
source§

impl<T, U> TryFrom<U> for T
where - U: Into<T>,

source§

type Error = Infallible

The type returned in the event of a conversion error.
source§

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
source§

impl<T, U> TryInto<U> for T
where - U: TryFrom<T>,

source§

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
source§

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.
\ No newline at end of file diff --git a/juicebox_asm/struct.MemOp8.html b/juicebox_asm/struct.MemOp8.html deleted file mode 100644 index c26e365..0000000 --- a/juicebox_asm/struct.MemOp8.html +++ /dev/null @@ -1,13 +0,0 @@ -MemOp8 in juicebox_asm - Rust
juicebox_asm

Struct MemOp8

source 
pub struct MemOp8(/* private fields */);
Expand description

A memory operand with a word (8 bit) size hint.

-

Implementations§

source§

impl MemOp8

source

pub fn from(op: MemOp) -> Self

Create a memory with size hint from a raw memory operand.

-

Trait Implementations§

source§

impl Dec<MemOp8> for Asm

source§

fn dec(&mut self, op1: MemOp8)

Emit a decrement instruction.
source§

impl Inc<MemOp8> for Asm

source§

fn inc(&mut self, op1: MemOp8)

Emit a increment instruction.

Auto Trait Implementations§

§

impl Freeze for MemOp8

§

impl RefUnwindSafe for MemOp8

§

impl Send for MemOp8

§

impl Sync for MemOp8

§

impl Unpin for MemOp8

§

impl UnwindSafe for MemOp8

Blanket Implementations§

source§

impl<T> Any for T
where - T: 'static + ?Sized,

source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
source§

impl<T> Borrow<T> for T
where - T: ?Sized,

source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
source§

impl<T> BorrowMut<T> for T
where - T: ?Sized,

source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
source§

impl<T> From<T> for T

source§

fn from(t: T) -> T

Returns the argument unchanged.

-
source§

impl<T, U> Into<U> for T
where - U: From<T>,

source§

fn into(self) -> U

Calls U::from(self).

-

That is, this conversion is whatever the implementation of -From<T> for U chooses to do.

-
source§

impl<T, U> TryFrom<U> for T
where - U: Into<T>,

source§

type Error = Infallible

The type returned in the event of a conversion error.
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for T
where - U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.
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if (typeof exports !== 'undefined') exports.searchIndex = searchIndex; else if (window.initSearch) window.initSearch(searchIndex); -//{"start":39,"fragment_lengths":[111,111,112,7962,1542]} \ No newline at end of file +//{"start":39,"fragment_lengths":[111,111,112,8192,1542]} \ No newline at end of file diff --git a/search.desc/juicebox_asm/juicebox_asm-desc-0-.js b/search.desc/juicebox_asm/juicebox_asm-desc-0-.js index 169ae31..e413321 100644 --- a/search.desc/juicebox_asm/juicebox_asm-desc-0-.js +++ b/search.desc/juicebox_asm/juicebox_asm-desc-0-.js @@ -1 +1 @@ -searchState.loadedDescShard("juicebox_asm", 0, "A simple x64 jit assembler with a minimal runtime to …\nx64 jit assembler.\nType representing a 16 bit immediate.\nType representing a 32 bit immediate.\nType representing a 64 bit immediate.\nType representing an 8 bit immediate.\nAn indirect memory operand, eg mov [rax], rcx.\nAn indirect memory operand in the form base + index, eg …\nAn indirect memory operand with additional displacement, …\nA label which is used as target for jump instructions.\nType representing a memory operand.\nA memory operand with a word (16 bit) size hint.\nA memory operand with a dword (32 bit) size hint.\nA memory operand with a qword (64 bit) size hint.\nA memory operand with a word (8 bit) size hint.\nDefinition of 16 bit registers.\nDefinition of 32 bit registers.\nDefinition of 64 bit registers.\nDefinition of 8 bit registers.\nA simple mmaped runtime with executable pages.\nAdd the block of code to the runtime and a get function …\nBind the Label to the current location.\nUnmaps the code page. This invalidates all the function …\nDump the code added so far to the runtime into a file …\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCreate a memory with size hint from a raw memory operand.\nCreate a memory with size hint from a raw memory operand.\nReturns the argument unchanged.\nCreate a memory with size hint from a raw memory operand.\nReturns the argument unchanged.\nCreate a memory with size hint from a raw memory operand.\nReturns the argument unchanged.\nTrait definitions of various instructions.\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nConsume the assembler and get the emitted code.\nCreate a new x64 jit assembler.\nCreate a new unbound Label.\nCreate a new Runtime.\nEmit a nop instruction.\nEmit a ret instruction.\nCreate a new Runtime which also generates static perf …\nTrait for add instruction kinds.\nTrait for call instruction kinds.\nTrait for cmovnz instruction kinds.\nTrait for cmovz instruction kinds.\nTrait for cmp instruction kinds.\nTrait for dec instruction kinds.\nTrait for inc instruction kinds.\nTrait for jmp instruction kinds.\nTrait for jnz instruction kinds.\nTrait for jz instruction kinds.\nTrait for mov instruction kinds.\nTrait for pop instruction kinds.\nTrait for push instruction kinds.\nTrait for sub instruction kinds.\nTrait for test instruction kinds.\nTrait for xor instruction kinds.\nEmit an add instruction.\nEmit a call instruction.\nEmit a (conditional) move if not zero instruction.\nEmit a (conditional) move if zero instruction.\nEmit a compare instruction.\nEmit a decrement instruction.\nEmit a increment instruction.\nEmit an unconditional jump instruction.\nEmit a conditional jump if not zero instruction (ZF = 0).\nEmit a conditional jump if zero instruction (ZF = 1).\nEmit an move instruction.\nEmit a pop instruction.\nEmit a push instruction.\nEmit an sub instruction.\nEmit a logical compare instruction.\nEmit a xor instruction.") \ No newline at end of file +searchState.loadedDescShard("juicebox_asm", 0, "A simple x64 jit assembler with a minimal runtime to …\nx64 jit assembler.\nType representing a 16 bit immediate.\nType representing a 32 bit immediate.\nType representing a 64 bit immediate.\nType representing an 8 bit immediate.\nA label which is used as target for jump instructions.\nA memory operand with word size (16 bit).\nA memory operand with dword size (32 bit).\nA memory operand with qword size (64 bit).\nA memory operand with byte size (8 bit).\nDefinition of 16 bit registers.\nDefinition of 32 bit registers.\nDefinition of 64 bit registers.\nDefinition of 8 bit registers.\nA simple mmaped runtime with executable pages.\nAdd the block of code to the runtime and a get function …\nBind the Label to the current location.\nUnmaps the code page. This invalidates all the function …\nDump the code added so far to the runtime into a file …\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCreate a memory operand with indirect addressing mode. For …\nCreate a memory operand with indirect addressing mode. For …\nCreate a memory operand with indirect addressing mode. For …\nCreate a memory operand with indirect addressing mode. For …\nCreate a memory operand with base + index addressing mode. …\nCreate a memory operand with base + index addressing mode. …\nCreate a memory operand with base + index addressing mode. …\nCreate a memory operand with base + index addressing mode. …\nCreate a memory operand with indirect + displacement …\nCreate a memory operand with indirect + displacement …\nCreate a memory operand with indirect + displacement …\nCreate a memory operand with indirect + displacement …\nTrait definitions of various instructions.\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nCalls U::from(self).\nConsume the assembler and get the emitted code.\nCreate a new x64 jit assembler.\nCreate a new unbound Label.\nCreate a new Runtime.\nEmit a nop instruction.\nEmit a ret instruction.\nCreate a new Runtime which also generates static perf …\nTrait for add instruction kinds.\nTrait for call instruction kinds.\nTrait for cmovnz instruction kinds.\nTrait for cmovz instruction kinds.\nTrait for cmp instruction kinds.\nTrait for dec instruction kinds.\nTrait for inc instruction kinds.\nTrait for jmp instruction kinds.\nTrait for jnz instruction kinds.\nTrait for jz instruction kinds.\nTrait for mov instruction kinds.\nTrait for pop instruction kinds.\nTrait for push instruction kinds.\nTrait for sub instruction kinds.\nTrait for test instruction kinds.\nTrait for xor instruction kinds.\nEmit an add instruction.\nEmit a call instruction.\nEmit a (conditional) move if not zero instruction.\nEmit a (conditional) move if zero instruction.\nEmit a compare instruction.\nEmit a decrement instruction.\nEmit a increment instruction.\nEmit an unconditional jump instruction.\nEmit a conditional jump if not zero instruction (ZF = 0).\nEmit a conditional jump if zero instruction (ZF = 1).\nEmit an move instruction.\nEmit a pop instruction.\nEmit a push instruction.\nEmit an sub instruction.\nEmit a logical compare instruction.\nEmit a xor instruction.") \ No newline at end of file diff --git a/src-files.js b/src-files.js index 91e9517..d7b79c1 100644 --- a/src-files.js +++ b/src-files.js @@ -1,3 +1,3 @@ -var srcIndex = new Map(JSON.parse('[["add",["",[],["add.rs"]]],["bf",["",[],["bf.rs"]]],["fib",["",[],["fib.rs"]]],["juicebox_asm",["",[["insn",[],["add.rs","call.rs","cmovnz.rs","cmovz.rs","cmp.rs","dec.rs","inc.rs","jmp.rs","jnz.rs","jz.rs","mov.rs","nop.rs","pop.rs","push.rs","ret.rs","sub.rs","test.rs","xor.rs"]]],["asm.rs","imm.rs","insn.rs","label.rs","lib.rs","reg.rs","rt.rs"]]],["tiny_vm",["",[],["tiny_vm.rs"]]]]')); +var srcIndex = new Map(JSON.parse('[["add",["",[],["add.rs"]]],["bf",["",[],["bf.rs"]]],["fib",["",[],["fib.rs"]]],["juicebox_asm",["",[["insn",[],["add.rs","call.rs","cmovnz.rs","cmovz.rs","cmp.rs","dec.rs","inc.rs","jmp.rs","jnz.rs","jz.rs","mov.rs","nop.rs","pop.rs","push.rs","ret.rs","sub.rs","test.rs","xor.rs"]]],["asm.rs","imm.rs","insn.rs","label.rs","lib.rs","mem.rs","reg.rs","rt.rs"]]],["tiny_vm",["",[],["tiny_vm.rs"]]]]')); createSrcSidebar(); -//{"start":36,"fragment_lengths":[26,25,27,274,35]} \ No newline at end of file +//{"start":36,"fragment_lengths":[26,25,27,283,35]} \ No newline at end of file diff --git a/src/bf/bf.rs.html b/src/bf/bf.rs.html index 9bd6202..b29403b 100644 --- a/src/bf/bf.rs.html +++ b/src/bf/bf.rs.html @@ -333,7 +333,11 @@ 332 333 334 -335
//! Brainfuck VM.
+335
+336
+337
+338
+339
//! Brainfuck VM.
 //!
 //! This example implements a simple
 //! [brainfuck](https://en.wikipedia.org/wiki/Brainfuck) interpreter
@@ -354,7 +358,7 @@
 
 use juicebox_asm::insn::*;
 use juicebox_asm::Runtime;
-use juicebox_asm::{Asm, Imm64, Imm8, Label, MemOp, MemOp8, Reg64, Reg8};
+use juicebox_asm::{Asm, Imm64, Imm8, Label, Mem8, Reg64, Reg8};
 
 // -- BRAINFUCK INTERPRETER ----------------------------------------------------
 
@@ -539,12 +543,14 @@
                 // single add instruction during compile time.
 
                 match vm.imem[pc..].iter().take_while(|&&i| i.eq(&'+')).count() {
-                    1 => asm.inc(MemOp8::from(MemOp::IndirectBaseIndex(dmem_base, dmem_idx))),
+                    1 => {
+                        asm.inc(Mem8::indirect_base_index(dmem_base, dmem_idx));
+                    }
                     cnt if cnt <= i8::MAX as usize => {
                         // For add m64, imm8, the immediate is sign-extend and
                         // hence treated as signed.
                         asm.add(
-                            MemOp::IndirectBaseIndex(dmem_base, dmem_idx),
+                            Mem8::indirect_base_index(dmem_base, dmem_idx),
                             Imm8::from(cnt as u8),
                         );
 
@@ -560,12 +566,14 @@
                 // single sub instruction during compile time.
 
                 match vm.imem[pc..].iter().take_while(|&&i| i.eq(&'-')).count() {
-                    1 => asm.dec(MemOp8::from(MemOp::IndirectBaseIndex(dmem_base, dmem_idx))),
+                    1 => {
+                        asm.dec(Mem8::indirect_base_index(dmem_base, dmem_idx));
+                    }
                     cnt if cnt <= i8::MAX as usize => {
                         // For sub m64, imm8, the immediate is sign-extend and
                         // hence treated as signed.
                         asm.sub(
-                            MemOp::IndirectBaseIndex(dmem_base, dmem_idx),
+                            Mem8::indirect_base_index(dmem_base, dmem_idx),
                             Imm8::from(cnt as u8),
                         );
 
@@ -582,7 +590,7 @@
                 // then call into putchar. Since we stored all out vm state in
                 // callee saved registers we don't need to save any registers
                 // before the call.
-                asm.mov(Reg8::dil, MemOp::IndirectBaseIndex(dmem_base, dmem_idx));
+                asm.mov(Reg8::dil, Mem8::indirect_base_index(dmem_base, dmem_idx));
                 asm.mov(Reg64::rax, Imm64::from(putchar as usize));
                 asm.call(Reg64::rax);
             }
@@ -598,7 +606,7 @@
                 // Goto label_pair.0 if data memory at active cell is 0.
                 //   if vm.dmem[vm.dptr] == 0 goto label_pair.0
                 asm.cmp(
-                    MemOp::IndirectBaseIndex(dmem_base, dmem_idx),
+                    Mem8::indirect_base_index(dmem_base, dmem_idx),
                     Imm8::from(0u8),
                 );
                 asm.jz(&mut label_pair.0);
@@ -615,7 +623,7 @@
                 // Goto label_pair.1 if data memory at active cell is not 0.
                 //   if vm.dmem[vm.dptr] != 0 goto label_pair.1
                 asm.cmp(
-                    MemOp::IndirectBaseIndex(dmem_base, dmem_idx),
+                    Mem8::indirect_base_index(dmem_base, dmem_idx),
                     Imm8::from(0u8),
                 );
                 asm.jnz(&mut label_pair.1);
diff --git a/src/juicebox_asm/asm.rs.html b/src/juicebox_asm/asm.rs.html
index 3f24ae2..1b159ca 100644
--- a/src/juicebox_asm/asm.rs.html
+++ b/src/juicebox_asm/asm.rs.html
@@ -450,17 +450,11 @@
 449
 450
 451
-452
-453
-454
-455
-456
-457
-458
-459
//! The `x64` jit assembler.
+452
//! The `x64` jit assembler.
 
 use crate::*;
 use imm::Imm;
+use mem::{AddrMode, Mem};
 use reg::Reg;
 
 /// Encode the `REX` byte.
@@ -614,24 +608,22 @@
     }
 
     /// Encode a memory operand instruction.
-    pub(crate) fn encode_m<T: MemOpSized>(&mut self, opc: u8, opc_ext: u8, op1: T)
+    pub(crate) fn encode_m<T: Mem>(&mut self, opc: u8, opc_ext: u8, op1: T)
     where
         Self: EncodeM<T>,
     {
-        let op1 = op1.mem_op();
-
         // M operand encoding.
         //   op1 -> modrm.rm
-        let (mode, rm) = match op1 {
-            MemOp::Indirect(..) => {
+        let (mode, rm) = match op1.mode() {
+            AddrMode::Indirect => {
                 assert!(!op1.base().need_sib() && !op1.base().is_pc_rel());
                 (0b00, op1.base().idx())
             }
-            MemOp::IndirectDisp(..) => {
+            AddrMode::IndirectDisp => {
                 assert!(!op1.base().need_sib());
                 (0b10, op1.base().idx())
             }
-            MemOp::IndirectBaseIndex(..) => {
+            AddrMode::IndirectBaseIndex => {
                 assert!(!op1.base().is_pc_rel());
                 // Using rsp as index register is interpreted as just base w/o offset.
                 //   https://wiki.osdev.org/X86-64_Instruction_Encoding#32.2F64-bit_addressing_2
@@ -652,31 +644,33 @@
 
         self.emit_optional(&[prefix, rex]);
         self.emit(&[opc, modrm]);
-        match op1 {
-            MemOp::Indirect(..) => {}
-            MemOp::IndirectDisp(_, disp) => self.emit(&disp.to_ne_bytes()),
-            MemOp::IndirectBaseIndex(base, index) => self.emit(&[sib(0, index.idx(), base.idx())]),
+        match op1.mode() {
+            AddrMode::Indirect => {}
+            AddrMode::IndirectDisp => self.emit(&op1.disp().to_ne_bytes()),
+            AddrMode::IndirectBaseIndex => {
+                self.emit(&[sib(0, op1.index().idx(), op1.base().idx())])
+            }
         }
     }
 
     /// Encode a memory-immediate instruction.
-    pub(crate) fn encode_mi<T: Imm>(&mut self, opc: u8, opc_ext: u8, op1: MemOp, op2: T)
+    pub(crate) fn encode_mi<M: Mem, T: Imm>(&mut self, opc: u8, opc_ext: u8, op1: M, op2: T)
     where
-        Self: EncodeMI<T>,
+        Self: EncodeMI<M>,
     {
         // MI operand encoding.
         //   op1 -> modrm.rm
         //   op2 -> imm
-        let (mode, rm) = match op1 {
-            MemOp::Indirect(..) => {
+        let (mode, rm) = match op1.mode() {
+            AddrMode::Indirect => {
                 assert!(!op1.base().need_sib() && !op1.base().is_pc_rel());
                 (0b00, op1.base().idx())
             }
-            MemOp::IndirectDisp(..) => {
+            AddrMode::IndirectDisp => {
                 assert!(!op1.base().need_sib());
                 (0b10, op1.base().idx())
             }
-            MemOp::IndirectBaseIndex(..) => {
+            AddrMode::IndirectBaseIndex => {
                 assert!(!op1.base().is_pc_rel());
                 // Using rsp as index register is interpreted as just base w/o offset.
                 //   https://wiki.osdev.org/X86-64_Instruction_Encoding#32.2F64-bit_addressing_2
@@ -692,37 +686,39 @@
             rm,      /* rm */
         );
 
-        let prefix = <Self as EncodeMI<T>>::legacy_prefix();
-        let rex = <Self as EncodeMI<T>>::rex(&op1);
+        let prefix = <Self as EncodeMI<M>>::legacy_prefix();
+        let rex = <Self as EncodeMI<M>>::rex(&op1);
 
         self.emit_optional(&[prefix, rex]);
         self.emit(&[opc, modrm]);
-        match op1 {
-            MemOp::Indirect(..) => {}
-            MemOp::IndirectDisp(_, disp) => self.emit(&disp.to_ne_bytes()),
-            MemOp::IndirectBaseIndex(base, index) => self.emit(&[sib(0, index.idx(), base.idx())]),
+        match op1.mode() {
+            AddrMode::Indirect => {}
+            AddrMode::IndirectDisp => self.emit(&op1.disp().to_ne_bytes()),
+            AddrMode::IndirectBaseIndex => {
+                self.emit(&[sib(0, op1.index().idx(), op1.base().idx())])
+            }
         }
         self.emit(op2.bytes());
     }
 
     /// Encode a memory-register instruction.
-    pub(crate) fn encode_mr<T: Reg>(&mut self, opc: u8, op1: MemOp, op2: T)
+    pub(crate) fn encode_mr<M: Mem, T: Reg>(&mut self, opc: u8, op1: M, op2: T)
     where
-        Self: EncodeMR<T>,
+        Self: EncodeMR<M>,
     {
         // MR operand encoding.
         //   op1 -> modrm.rm
         //   op2 -> modrm.reg
-        let (mode, rm) = match op1 {
-            MemOp::Indirect(..) => {
+        let (mode, rm) = match op1.mode() {
+            AddrMode::Indirect => {
                 assert!(!op1.base().need_sib() && !op1.base().is_pc_rel());
                 (0b00, op1.base().idx())
             }
-            MemOp::IndirectDisp(..) => {
+            AddrMode::IndirectDisp => {
                 assert!(!op1.base().need_sib());
                 (0b10, op1.base().idx())
             }
-            MemOp::IndirectBaseIndex(..) => {
+            AddrMode::IndirectBaseIndex => {
                 assert!(!op1.base().is_pc_rel());
                 // Using rsp as index register is interpreted as just base w/o offset.
                 //   https://wiki.osdev.org/X86-64_Instruction_Encoding#32.2F64-bit_addressing_2
@@ -738,22 +734,24 @@
             rm,        /* rm */
         );
 
-        let prefix = <Self as EncodeMR<T>>::legacy_prefix();
-        let rex = <Self as EncodeMR<T>>::rex(&op1, op2);
+        let prefix = <Self as EncodeMR<M>>::legacy_prefix();
+        let rex = <Self as EncodeMR<M>>::rex(&op1, op2);
 
         self.emit_optional(&[prefix, rex]);
         self.emit(&[opc, modrm]);
-        match op1 {
-            MemOp::Indirect(..) => {}
-            MemOp::IndirectDisp(_, disp) => self.emit(&disp.to_ne_bytes()),
-            MemOp::IndirectBaseIndex(base, index) => self.emit(&[sib(0, index.idx(), base.idx())]),
+        match op1.mode() {
+            AddrMode::Indirect => {}
+            AddrMode::IndirectDisp => self.emit(&op1.disp().to_ne_bytes()),
+            AddrMode::IndirectBaseIndex => {
+                self.emit(&[sib(0, op1.index().idx(), op1.base().idx())])
+            }
         }
     }
 
     /// Encode a register-memory instruction.
-    pub(crate) fn encode_rm<T: Reg>(&mut self, opc: u8, op1: T, op2: MemOp)
+    pub(crate) fn encode_rm<T: Reg, M: Mem>(&mut self, opc: u8, op1: T, op2: M)
     where
-        Self: EncodeMR<T>,
+        Self: EncodeMR<M>,
     {
         // RM operand encoding.
         //   op1 -> modrm.reg
@@ -829,15 +827,15 @@
 impl EncodeR<Reg64> for Asm {}
 
 /// Encode helper for memory-register instructions.
-pub(crate) trait EncodeMR<T: Reg> {
+pub(crate) trait EncodeMR<M: Mem> {
     fn legacy_prefix() -> Option<u8> {
         None
     }
 
-    fn rex(op1: &MemOp, op2: T) -> Option<u8> {
-        if op2.need_rex() || op1.base().is_ext() || op1.index().is_ext() {
+    fn rex<T: Reg>(op1: &M, op2: T) -> Option<u8> {
+        if M::is_64() || op2.is_ext() || op1.base().is_ext() || op1.index().is_ext() {
             Some(rex(
-                op2.rexw(),
+                M::is_64(),
                 op2.idx(),
                 op1.index().idx(),
                 op1.base().idx(),
@@ -848,72 +846,60 @@
     }
 }
 
-impl EncodeMR<Reg8> for Asm {}
-impl EncodeMR<Reg16> for Asm {
+impl EncodeMR<Mem8> for Asm {}
+impl EncodeMR<Mem16> for Asm {
     fn legacy_prefix() -> Option<u8> {
         Some(0x66)
     }
 }
-impl EncodeMR<Reg32> for Asm {}
-impl EncodeMR<Reg64> for Asm {}
+impl EncodeMR<Mem32> for Asm {}
+impl EncodeMR<Mem64> for Asm {}
 
 /// Encode helper for memory-immediate instructions.
-pub(crate) trait EncodeMI<T: Imm> {
+pub(crate) trait EncodeMI<M: Mem> {
     fn legacy_prefix() -> Option<u8> {
         None
     }
 
-    fn rex(op1: &MemOp) -> Option<u8> {
-        if op1.base().is_ext() || op1.index().is_ext() {
-            Some(rex(false, 0, op1.index().idx(), op1.base().idx()))
+    fn rex(op1: &M) -> Option<u8> {
+        if M::is_64() || op1.base().is_ext() || op1.index().is_ext() {
+            Some(rex(M::is_64(), 0, op1.index().idx(), op1.base().idx()))
         } else {
             None
         }
     }
 }
 
-impl EncodeMI<Imm8> for Asm {}
-impl EncodeMI<Imm16> for Asm {
+impl EncodeMI<Mem8> for Asm {}
+impl EncodeMI<Mem16> for Asm {
     fn legacy_prefix() -> Option<u8> {
         Some(0x66)
     }
 }
-impl EncodeMI<Imm32> for Asm {}
+impl EncodeMI<Mem32> for Asm {}
+impl EncodeMI<Mem64> for Asm {}
 
 /// Encode helper for memory operand instructions.
-pub(crate) trait EncodeM<T: MemOpSized> {
+pub(crate) trait EncodeM<M: Mem> {
     fn legacy_prefix() -> Option<u8> {
         None
     }
 
-    fn rex(op1: &MemOp) -> Option<u8> {
-        if op1.base().is_ext() || op1.index().is_ext() || Self::is_64bit() {
-            Some(rex(
-                Self::is_64bit(),
-                0,
-                op1.index().idx(),
-                op1.base().idx(),
-            ))
+    fn rex(op1: &M) -> Option<u8> {
+        if M::is_64() || op1.base().is_ext() || op1.index().is_ext() {
+            Some(rex(M::is_64(), 0, op1.index().idx(), op1.base().idx()))
         } else {
             None
         }
     }
-
-    fn is_64bit() -> bool {
-        false
-    }
 }
 
-impl EncodeM<MemOp8> for Asm {}
-impl EncodeM<MemOp16> for Asm {
+impl EncodeM<Mem8> for Asm {}
+impl EncodeM<Mem16> for Asm {
     fn legacy_prefix() -> Option<u8> {
         Some(0x66)
     }
 }
-impl EncodeM<MemOp32> for Asm {}
-impl EncodeM<MemOp64> for Asm {
-    fn is_64bit() -> bool {
-        true
-    }
-}
+impl EncodeM<Mem32> for Asm {}
+impl EncodeM<Mem64> for Asm {}

\ No newline at end of file diff --git a/src/juicebox_asm/insn/add.rs.html b/src/juicebox_asm/insn/add.rs.html index f91aa25..be3d025 100644 --- a/src/juicebox_asm/insn/add.rs.html +++ b/src/juicebox_asm/insn/add.rs.html @@ -42,48 +42,84 @@ 41 42 43 -44
use super::Add;
-use crate::{Asm, Imm16, Imm8, MemOp, Reg16, Reg32, Reg64};
+44
+45
+46
+47
+48
+49
+50
+51
+52
+53
+54
+55
+56
+57
+58
+59
+60
+61
+62
use super::Add;
+use crate::{Asm, Imm16, Imm8, Mem16, Mem32, Mem64, Mem8, Reg16, Reg32, Reg64};
 
-impl Add<Reg64, Reg64> for Asm {
-    fn add(&mut self, op1: Reg64, op2: Reg64) {
+impl Add<Reg32, Reg32> for Asm {
+    fn add(&mut self, op1: Reg32, op2: Reg32) {
         self.encode_rr(&[0x01], op1, op2);
     }
 }
 
-impl Add<Reg32, Reg32> for Asm {
-    fn add(&mut self, op1: Reg32, op2: Reg32) {
+impl Add<Reg64, Reg64> for Asm {
+    fn add(&mut self, op1: Reg64, op2: Reg64) {
         self.encode_rr(&[0x01], op1, op2);
     }
 }
 
-impl Add<MemOp, Reg64> for Asm {
-    fn add(&mut self, op1: MemOp, op2: Reg64) {
+impl Add<Mem16, Reg16> for Asm {
+    fn add(&mut self, op1: Mem16, op2: Reg16) {
         self.encode_mr(0x01, op1, op2);
     }
 }
 
-impl Add<MemOp, Reg16> for Asm {
-    fn add(&mut self, op1: MemOp, op2: Reg16) {
+impl Add<Mem64, Reg64> for Asm {
+    fn add(&mut self, op1: Mem64, op2: Reg64) {
         self.encode_mr(0x01, op1, op2);
     }
 }
 
-impl Add<MemOp, Imm8> for Asm {
-    fn add(&mut self, op1: MemOp, op2: Imm8) {
+impl Add<Reg64, Mem64> for Asm {
+    fn add(&mut self, op1: Reg64, op2: Mem64) {
+        self.encode_rm(0x03, op1, op2);
+    }
+}
+
+impl Add<Mem8, Imm8> for Asm {
+    fn add(&mut self, op1: Mem8, op2: Imm8) {
+        self.encode_mi(0x80, 0, op1, op2);
+    }
+}
+
+impl Add<Mem16, Imm8> for Asm {
+    fn add(&mut self, op1: Mem16, op2: Imm8) {
         self.encode_mi(0x83, 0, op1, op2);
     }
 }
 
-impl Add<MemOp, Imm16> for Asm {
-    fn add(&mut self, op1: MemOp, op2: Imm16) {
-        self.encode_mi(0x81, 0, op1, op2);
+impl Add<Mem32, Imm8> for Asm {
+    fn add(&mut self, op1: Mem32, op2: Imm8) {
+        self.encode_mi(0x83, 0, op1, op2);
     }
 }
 
-impl Add<Reg64, MemOp> for Asm {
-    fn add(&mut self, op1: Reg64, op2: MemOp) {
-        self.encode_rm(0x03, op1, op2);
+impl Add<Mem64, Imm8> for Asm {
+    fn add(&mut self, op1: Mem64, op2: Imm8) {
+        self.encode_mi(0x83, 0, op1, op2);
+    }
+}
+
+impl Add<Mem16, Imm16> for Asm {
+    fn add(&mut self, op1: Mem16, op2: Imm16) {
+        self.encode_mi(0x81, 0, op1, op2);
     }
 }
\ No newline at end of file diff --git a/src/juicebox_asm/insn/cmp.rs.html b/src/juicebox_asm/insn/cmp.rs.html index a4e5447..35bb5b7 100644 --- a/src/juicebox_asm/insn/cmp.rs.html +++ b/src/juicebox_asm/insn/cmp.rs.html @@ -13,16 +13,16 @@ 12 13 14
use super::Cmp;
-use crate::{Asm, Imm16, Imm8, MemOp};
+use crate::{Asm, Imm16, Imm8, Mem16, Mem8};
 
-impl Cmp<MemOp, Imm8> for Asm {
-    fn cmp(&mut self, op1: MemOp, op2: Imm8) {
+impl Cmp<Mem8, Imm8> for Asm {
+    fn cmp(&mut self, op1: Mem8, op2: Imm8) {
         self.encode_mi(0x80, 0x7, op1, op2);
     }
 }
 
-impl Cmp<MemOp, Imm16> for Asm {
-    fn cmp(&mut self, op1: MemOp, op2: Imm16) {
+impl Cmp<Mem16, Imm16> for Asm {
+    fn cmp(&mut self, op1: Mem16, op2: Imm16) {
         self.encode_mi(0x81, 0x7, op1, op2);
     }
 }
diff --git a/src/juicebox_asm/insn/dec.rs.html b/src/juicebox_asm/insn/dec.rs.html
index 7a05154..4bd9216 100644
--- a/src/juicebox_asm/insn/dec.rs.html
+++ b/src/juicebox_asm/insn/dec.rs.html
@@ -37,7 +37,7 @@
 36
 37
 38

use super::Dec;
-use crate::{Asm, MemOp16, MemOp32, MemOp64, MemOp8, Reg32, Reg64};
+use crate::{Asm, Mem16, Mem32, Mem64, Mem8, Reg32, Reg64};
 
 impl Dec<Reg64> for Asm {
     fn dec(&mut self, op1: Reg64) {
@@ -51,26 +51,26 @@
     }
 }
 
-impl Dec<MemOp8> for Asm {
-    fn dec(&mut self, op1: MemOp8) {
+impl Dec<Mem8> for Asm {
+    fn dec(&mut self, op1: Mem8) {
         self.encode_m(0xfe, 1, op1);
     }
 }
 
-impl Dec<MemOp16> for Asm {
-    fn dec(&mut self, op1: MemOp16) {
+impl Dec<Mem16> for Asm {
+    fn dec(&mut self, op1: Mem16) {
         self.encode_m(0xff, 1, op1);
     }
 }
 
-impl Dec<MemOp32> for Asm {
-    fn dec(&mut self, op1: MemOp32) {
+impl Dec<Mem32> for Asm {
+    fn dec(&mut self, op1: Mem32) {
         self.encode_m(0xff, 1, op1);
     }
 }
 
-impl Dec<MemOp64> for Asm {
-    fn dec(&mut self, op1: MemOp64) {
+impl Dec<Mem64> for Asm {
+    fn dec(&mut self, op1: Mem64) {
         self.encode_m(0xff, 1, op1);
     }
 }
diff --git a/src/juicebox_asm/insn/inc.rs.html b/src/juicebox_asm/insn/inc.rs.html
index 05ce6bb..c559c66 100644
--- a/src/juicebox_asm/insn/inc.rs.html
+++ b/src/juicebox_asm/insn/inc.rs.html
@@ -37,7 +37,7 @@
 36
 37
 38
use super::Inc;
-use crate::{Asm, MemOp16, MemOp32, MemOp64, MemOp8, Reg32, Reg64};
+use crate::{Asm, Mem16, Mem32, Mem64, Mem8, Reg32, Reg64};
 
 impl Inc<Reg64> for Asm {
     fn inc(&mut self, op1: Reg64) {
@@ -51,26 +51,26 @@
     }
 }
 
-impl Inc<MemOp8> for Asm {
-    fn inc(&mut self, op1: MemOp8) {
+impl Inc<Mem8> for Asm {
+    fn inc(&mut self, op1: Mem8) {
         self.encode_m(0xfe, 0, op1);
     }
 }
 
-impl Inc<MemOp16> for Asm {
-    fn inc(&mut self, op1: MemOp16) {
+impl Inc<Mem16> for Asm {
+    fn inc(&mut self, op1: Mem16) {
         self.encode_m(0xff, 0, op1);
     }
 }
 
-impl Inc<MemOp32> for Asm {
-    fn inc(&mut self, op1: MemOp32) {
+impl Inc<Mem32> for Asm {
+    fn inc(&mut self, op1: Mem32) {
         self.encode_m(0xff, 0, op1);
     }
 }
 
-impl Inc<MemOp64> for Asm {
-    fn inc(&mut self, op1: MemOp64) {
+impl Inc<Mem64> for Asm {
+    fn inc(&mut self, op1: Mem64) {
         self.encode_m(0xff, 0, op1);
     }
 }
diff --git a/src/juicebox_asm/insn/mov.rs.html b/src/juicebox_asm/insn/mov.rs.html
index 5bd4111..ab91c85 100644
--- a/src/juicebox_asm/insn/mov.rs.html
+++ b/src/juicebox_asm/insn/mov.rs.html
@@ -113,7 +113,7 @@
 112
 113
 114
use super::Mov;
-use crate::{Asm, Imm16, Imm32, Imm64, Imm8, MemOp, Reg16, Reg32, Reg64, Reg8};
+use crate::{Asm, Imm16, Imm32, Imm64, Imm8, Mem16, Mem32, Mem64, Mem8, Reg16, Reg32, Reg64, Reg8};
 
 // -- MOV : reg reg
 
@@ -143,52 +143,52 @@
 
 // -- MOV : mem reg
 
-impl Mov<MemOp, Reg64> for Asm {
-    fn mov(&mut self, op1: MemOp, op2: Reg64) {
+impl Mov<Mem64, Reg64> for Asm {
+    fn mov(&mut self, op1: Mem64, op2: Reg64) {
         self.encode_mr(0x89, op1, op2);
     }
 }
 
-impl Mov<MemOp, Reg32> for Asm {
-    fn mov(&mut self, op1: MemOp, op2: Reg32) {
+impl Mov<Mem32, Reg32> for Asm {
+    fn mov(&mut self, op1: Mem32, op2: Reg32) {
         self.encode_mr(0x89, op1, op2);
     }
 }
 
-impl Mov<MemOp, Reg16> for Asm {
-    fn mov(&mut self, op1: MemOp, op2: Reg16) {
+impl Mov<Mem16, Reg16> for Asm {
+    fn mov(&mut self, op1: Mem16, op2: Reg16) {
         self.encode_mr(0x89, op1, op2);
     }
 }
 
-impl Mov<MemOp, Reg8> for Asm {
-    fn mov(&mut self, op1: MemOp, op2: Reg8) {
+impl Mov<Mem8, Reg8> for Asm {
+    fn mov(&mut self, op1: Mem8, op2: Reg8) {
         self.encode_mr(0x88, op1, op2);
     }
 }
 
 // -- MOV : reg mem
 
-impl Mov<Reg64, MemOp> for Asm {
-    fn mov(&mut self, op1: Reg64, op2: MemOp) {
+impl Mov<Reg64, Mem64> for Asm {
+    fn mov(&mut self, op1: Reg64, op2: Mem64) {
         self.encode_rm(0x8b, op1, op2);
     }
 }
 
-impl Mov<Reg32, MemOp> for Asm {
-    fn mov(&mut self, op1: Reg32, op2: MemOp) {
+impl Mov<Reg32, Mem32> for Asm {
+    fn mov(&mut self, op1: Reg32, op2: Mem32) {
         self.encode_rm(0x8b, op1, op2);
     }
 }
 
-impl Mov<Reg16, MemOp> for Asm {
-    fn mov(&mut self, op1: Reg16, op2: MemOp) {
+impl Mov<Reg16, Mem16> for Asm {
+    fn mov(&mut self, op1: Reg16, op2: Mem16) {
         self.encode_rm(0x8b, op1, op2);
     }
 }
 
-impl Mov<Reg8, MemOp> for Asm {
-    fn mov(&mut self, op1: Reg8, op2: MemOp) {
+impl Mov<Reg8, Mem8> for Asm {
+    fn mov(&mut self, op1: Reg8, op2: Mem8) {
         self.encode_rm(0x8a, op1, op2);
     }
 }
@@ -221,8 +221,8 @@
 
 // -- MOV : mem imm
 
-impl Mov<MemOp, Imm16> for Asm {
-    fn mov(&mut self, op1: MemOp, op2: Imm16) {
+impl Mov<Mem16, Imm16> for Asm {
+    fn mov(&mut self, op1: Mem16, op2: Imm16) {
         self.encode_mi(0xc7, 0, op1, op2);
     }
 }
diff --git a/src/juicebox_asm/insn/sub.rs.html b/src/juicebox_asm/insn/sub.rs.html
index f350d05..b385a09 100644
--- a/src/juicebox_asm/insn/sub.rs.html
+++ b/src/juicebox_asm/insn/sub.rs.html
@@ -13,7 +13,7 @@
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 13
 14
use super::Sub;
-use crate::{Asm, Imm8, MemOp, Reg64};
+use crate::{Asm, Imm8, Mem8, Reg64};
 
 impl Sub<Reg64, Reg64> for Asm {
     fn sub(&mut self, op1: Reg64, op2: Reg64) {
@@ -21,9 +21,9 @@
     }
 }
 
-impl Sub<MemOp, Imm8> for Asm {
-    fn sub(&mut self, op1: MemOp, op2: Imm8) {
-        self.encode_mi(0x83, 5, op1, op2);
+impl Sub<Mem8, Imm8> for Asm {
+    fn sub(&mut self, op1: Mem8, op2: Imm8) {
+        self.encode_mi(0x80, 5, op1, op2);
     }
 }
\ No newline at end of file diff --git a/src/juicebox_asm/insn/test.rs.html b/src/juicebox_asm/insn/test.rs.html index 4c9bd7d..32339bc 100644 --- a/src/juicebox_asm/insn/test.rs.html +++ b/src/juicebox_asm/insn/test.rs.html @@ -19,7 +19,7 @@ 18 19 20
use super::Test;
-use crate::{Asm, Imm16, MemOp, Reg32, Reg64};
+use crate::{Asm, Imm16, Mem16, Reg32, Reg64};
 
 impl Test<Reg64, Reg64> for Asm {
     fn test(&mut self, op1: Reg64, op2: Reg64) {
@@ -33,8 +33,8 @@
     }
 }
 
-impl Test<MemOp, Imm16> for Asm {
-    fn test(&mut self, op1: MemOp, op2: Imm16) {
+impl Test<Mem16, Imm16> for Asm {
+    fn test(&mut self, op1: Mem16, op2: Imm16) {
         self.encode_mi(0xf7, 0, op1, op2);
     }
 }
diff --git a/src/juicebox_asm/lib.rs.html b/src/juicebox_asm/lib.rs.html
index 2b9ed8a..4b32e80 100644
--- a/src/juicebox_asm/lib.rs.html
+++ b/src/juicebox_asm/lib.rs.html
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//! A simple `x64` jit assembler with a minimal runtime to execute emitted code for fun.
+90
//! A simple `x64` jit assembler with a minimal runtime to execute emitted code for fun.
 //!
 //! The following is an fibonacci example implementation.
 //! ```rust
@@ -240,6 +166,7 @@
 mod asm;
 mod imm;
 mod label;
+mod mem;
 mod reg;
 mod rt;
 
@@ -248,82 +175,7 @@
 pub use asm::Asm;
 pub use imm::{Imm16, Imm32, Imm64, Imm8};
 pub use label::Label;
+pub use mem::{Mem16, Mem32, Mem64, Mem8};
 pub use reg::{Reg16, Reg32, Reg64, Reg8};
 pub use rt::Runtime;
-
-/// Type representing a memory operand.
-#[derive(Clone, Copy)]
-pub enum MemOp {
-    /// An indirect memory operand, eg `mov [rax], rcx`.
-    Indirect(Reg64),
-
-    /// An indirect memory operand with additional displacement, eg `mov [rax + 0x10], rcx`.
-    IndirectDisp(Reg64, i32),
-
-    /// An indirect memory operand in the form base + index, eg `mov [rax + rcx], rdx`.
-    IndirectBaseIndex(Reg64, Reg64),
-}
-
-impl MemOp {
-    /// Get the base address register of the memory operand.
-    const fn base(&self) -> Reg64 {
-        match self {
-            MemOp::Indirect(base) => *base,
-            MemOp::IndirectDisp(base, ..) => *base,
-            MemOp::IndirectBaseIndex(base, ..) => *base,
-        }
-    }
-
-    /// Get the index register of the memory operand.
-    fn index(&self) -> Reg64 {
-        // Return zero index register for memory operands w/o index register.
-        let zero_index = Reg64::rax;
-        use reg::Reg;
-        assert_eq!(zero_index.idx(), 0);
-
-        match self {
-            MemOp::Indirect(..) => zero_index,
-            MemOp::IndirectDisp(..) => zero_index,
-            MemOp::IndirectBaseIndex(.., index) => *index,
-        }
-    }
-}
-
-/// Trait to give size hints for memory operands.
-trait MemOpSized {
-    fn mem_op(&self) -> MemOp;
-}
-
-macro_rules! impl_memop_sized {
-    ($(#[$doc:meta] $name:ident)+) => {
-        $(
-        #[$doc]
-        pub struct $name(MemOp);
-
-        impl $name {
-            /// Create a memory with size hint from a raw memory operand.
-            pub fn from(op: MemOp) -> Self {
-                Self(op)
-            }
-        }
-
-        impl MemOpSized for $name {
-            fn mem_op(&self) -> MemOp {
-                self.0
-            }
-        }
-        )+
-    };
-}
-
-impl_memop_sized!(
-    /// A memory operand with a word (8 bit) size hint.
-    MemOp8
-    /// A memory operand with a word (16 bit) size hint.
-    MemOp16
-    /// A memory operand with a dword (32 bit) size hint.
-    MemOp32
-    /// A memory operand with a qword (64 bit) size hint.
-    MemOp64
-);
\ No newline at end of file diff --git a/src/juicebox_asm/mem.rs.html b/src/juicebox_asm/mem.rs.html new file mode 100644 index 0000000..7212af9 --- /dev/null +++ b/src/juicebox_asm/mem.rs.html @@ -0,0 +1,233 @@ +mem.rs - source

juicebox_asm/
mem.rs

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//! Definition of different addressing modes and memory operande used as input
+//! and ouput operands in various instructions.
+
+use crate::Reg64;
+
+#[derive(Clone, Copy)]
+pub(crate) enum AddrMode {
+    /// An indirect memory operand, eg `mov [rax], rcx`.
+    Indirect,
+    /// An indirect memory operand with additional displacement, eg `mov [rax + 0x10], rcx`.
+    IndirectDisp,
+    /// An indirect memory operand in the form base + index, eg `mov [rax + rcx], rdx`.
+    IndirectBaseIndex,
+}
+
+/// Trait to interact with memory operands.
+pub(crate) trait Mem {
+    /// Get the addressing mode [`AddrMode`] of the memory operand.
+    fn mode(&self) -> AddrMode;
+
+    /// Get the base address register of the memory operand.
+    fn base(&self) -> Reg64;
+
+    /// Get the index register of the memory operand.
+    fn index(&self) -> Reg64;
+
+    /// Get the displacement of the memory operand.
+    fn disp(&self) -> i32;
+
+    /// Check if memory operand is 64 bit.
+    fn is_64() -> bool;
+}
+
+macro_rules! impl_mem {
+    ($(#[$doc:meta] $name:ident)+) => {
+        $(
+        #[$doc]
+        pub struct $name {
+            mode: AddrMode,
+            base: Reg64,
+            index: Reg64,
+            disp: i32,
+        }
+
+        impl Mem for $name {
+            fn mode(&self) -> AddrMode {
+                self.mode
+            }
+
+            fn base(&self) -> Reg64 {
+                self.base
+            }
+
+            fn index(&self) -> Reg64 {
+                self.index
+            }
+
+            fn disp(&self) -> i32 {
+                self.disp
+            }
+
+            fn is_64() -> bool {
+                use std::any::TypeId;
+                TypeId::of::<Self>() == TypeId::of::<Mem64>()
+            }
+        }
+
+        impl $name {
+            /// Create a memory operand with `indirect` addressing mode.
+            /// For example `mov [rax], rcx`.
+            pub fn indirect(base: Reg64) -> Self {
+                Self {
+                    mode: AddrMode::Indirect,
+                    base,
+                    index: Reg64::rax, /* zero index */
+                    disp: 0,
+                }
+            }
+
+            /// Create a memory operand with `indirect + displacement`
+            /// addressing mode.
+            /// For example `mov [rax + 0x10], rcx`.
+            pub fn indirect_disp(base: Reg64, disp: i32) -> Self {
+                Self {
+                    mode: AddrMode::IndirectDisp,
+                    base,
+                    index: Reg64::rax, /* zero index */
+                    disp,
+                }
+            }
+
+            /// Create a memory operand with `base + index` addressing mode.
+            /// For example `mov [rax + rcx], rdx`.
+            pub fn indirect_base_index(base: Reg64, index: Reg64) -> Self {
+                Self {
+                    mode: AddrMode::IndirectBaseIndex,
+                    base,
+                    index,
+                    disp: 0,
+                }
+            }
+        }
+        )+
+    }
+}
+
+impl_mem!(
+    /// A memory operand with `byte` size (8 bit).
+    Mem8
+    /// A memory operand with `word` size (16 bit).
+    Mem16
+    /// A memory operand with `dword` size (32 bit).
+    Mem32
+    /// A memory operand with `qword` size (64 bit).
+    Mem64
+);
+
\ No newline at end of file diff --git a/src/tiny_vm/tiny_vm.rs.html b/src/tiny_vm/tiny_vm.rs.html index 13c5a44..8062aa5 100644 --- a/src/tiny_vm/tiny_vm.rs.html +++ b/src/tiny_vm/tiny_vm.rs.html @@ -743,7 +743,7 @@ use juicebox_asm::insn::*; use juicebox_asm::Runtime; -use juicebox_asm::{Asm, Imm16, Imm64, MemOp, Reg16, Reg64}; +use juicebox_asm::{Asm, Imm16, Imm64, Mem16, Reg16, Reg64}; /// A guest physical address. pub struct PhysAddr(pub u16); @@ -990,11 +990,11 @@ // Generate memory operand into regs for guest register. let reg_op = |r: TinyReg| { - MemOp::IndirectDisp(Reg64::rdi, (r.idx() * 2).try_into().expect("only 3 regs")) + Mem16::indirect_disp(Reg64::rdi, (r.idx() * 2).try_into().expect("only 3 regs")) }; // Generate memory operand into dmem for guest phys address. - let mem_op = |paddr: u16| MemOp::IndirectDisp(Reg64::rsi, paddr.into()); + let mem_op = |paddr: u16| Mem16::indirect_disp(Reg64::rsi, paddr.into()); // Compute instructions in translated basic block. let bb_icnt = || -> u64 { (pc - self.pc).try_into().unwrap() }; diff --git a/trait.impl/core/clone/trait.Clone.js b/trait.impl/core/clone/trait.Clone.js index 6c6477b..c090761 100644 --- a/trait.impl/core/clone/trait.Clone.js +++ b/trait.impl/core/clone/trait.Clone.js @@ -1,9 +1,9 @@ (function() { - var implementors = Object.fromEntries([["juicebox_asm",[["impl Clone for MemOp"],["impl Clone for Reg16"],["impl Clone for Reg32"],["impl Clone for Reg64"],["impl Clone for Reg8"]]],["tiny_vm",[["impl Clone for TinyInsn"],["impl Clone for TinyReg"]]]]); + var implementors = Object.fromEntries([["juicebox_asm",[["impl Clone for Reg16"],["impl Clone for Reg32"],["impl Clone for Reg64"],["impl Clone for Reg8"]]],["tiny_vm",[["impl Clone for TinyInsn"],["impl Clone for TinyReg"]]]]); if (window.register_implementors) { window.register_implementors(implementors); } else { window.pending_implementors = implementors; } })() -//{"start":57,"fragment_lengths":[1255,505]} \ No newline at end of file +//{"start":57,"fragment_lengths":[1007,505]} \ No newline at end of file diff --git a/trait.impl/core/marker/trait.Copy.js b/trait.impl/core/marker/trait.Copy.js index 52c4a65..aecaff6 100644 --- a/trait.impl/core/marker/trait.Copy.js +++ b/trait.impl/core/marker/trait.Copy.js @@ -1,9 +1,9 @@ (function() { - var implementors = Object.fromEntries([["juicebox_asm",[["impl Copy for MemOp"],["impl Copy for Reg16"],["impl Copy for Reg32"],["impl Copy for Reg64"],["impl Copy for Reg8"]]],["tiny_vm",[["impl Copy for TinyInsn"],["impl Copy for TinyReg"]]]]); + var implementors = Object.fromEntries([["juicebox_asm",[["impl Copy for Reg16"],["impl Copy for Reg32"],["impl Copy for Reg64"],["impl Copy for Reg8"]]],["tiny_vm",[["impl Copy for TinyInsn"],["impl Copy for TinyReg"]]]]); if (window.register_implementors) { window.register_implementors(implementors); } else { window.pending_implementors = implementors; } })() -//{"start":57,"fragment_lengths":[1250,503]} \ No newline at end of file +//{"start":57,"fragment_lengths":[1003,503]} \ No newline at end of file diff --git a/trait.impl/core/marker/trait.Freeze.js b/trait.impl/core/marker/trait.Freeze.js index 16c37e5..16b2bb5 100644 --- a/trait.impl/core/marker/trait.Freeze.js +++ b/trait.impl/core/marker/trait.Freeze.js @@ -1,9 +1,9 @@ (function() { - var implementors = Object.fromEntries([["juicebox_asm",[["impl Freeze for MemOp",1,["juicebox_asm::MemOp"]],["impl Freeze for Reg16",1,["juicebox_asm::reg::Reg16"]],["impl Freeze for Reg32",1,["juicebox_asm::reg::Reg32"]],["impl Freeze for Reg64",1,["juicebox_asm::reg::Reg64"]],["impl Freeze for Reg8",1,["juicebox_asm::reg::Reg8"]],["impl Freeze for Asm",1,["juicebox_asm::asm::Asm"]],["impl Freeze for Imm16",1,["juicebox_asm::imm::Imm16"]],["impl Freeze for Imm32",1,["juicebox_asm::imm::Imm32"]],["impl Freeze for Imm64",1,["juicebox_asm::imm::Imm64"]],["impl Freeze for Imm8",1,["juicebox_asm::imm::Imm8"]],["impl Freeze for Label",1,["juicebox_asm::label::Label"]],["impl Freeze for MemOp16",1,["juicebox_asm::MemOp16"]],["impl Freeze for MemOp32",1,["juicebox_asm::MemOp32"]],["impl Freeze for MemOp64",1,["juicebox_asm::MemOp64"]],["impl Freeze for MemOp8",1,["juicebox_asm::MemOp8"]],["impl Freeze for Runtime",1,["juicebox_asm::rt::Runtime"]]]],["tiny_vm",[["impl Freeze for TinyInsn",1,["tiny_vm::TinyInsn"]],["impl Freeze for TinyReg",1,["tiny_vm::TinyReg"]],["impl Freeze for Fixup",1,["tiny_vm::Fixup"]],["impl Freeze for PhysAddr",1,["tiny_vm::PhysAddr"]],["impl Freeze for TinyVm",1,["tiny_vm::TinyVm"]]]]]); + var implementors = Object.fromEntries([["juicebox_asm",[["impl Freeze for Reg16",1,["juicebox_asm::reg::Reg16"]],["impl Freeze for Reg32",1,["juicebox_asm::reg::Reg32"]],["impl Freeze for Reg64",1,["juicebox_asm::reg::Reg64"]],["impl Freeze for Reg8",1,["juicebox_asm::reg::Reg8"]],["impl Freeze for Asm",1,["juicebox_asm::asm::Asm"]],["impl Freeze for Imm16",1,["juicebox_asm::imm::Imm16"]],["impl Freeze for Imm32",1,["juicebox_asm::imm::Imm32"]],["impl Freeze for Imm64",1,["juicebox_asm::imm::Imm64"]],["impl Freeze for Imm8",1,["juicebox_asm::imm::Imm8"]],["impl Freeze for Label",1,["juicebox_asm::label::Label"]],["impl Freeze for Mem16",1,["juicebox_asm::mem::Mem16"]],["impl Freeze for Mem32",1,["juicebox_asm::mem::Mem32"]],["impl Freeze for Mem64",1,["juicebox_asm::mem::Mem64"]],["impl Freeze for Mem8",1,["juicebox_asm::mem::Mem8"]],["impl Freeze for Runtime",1,["juicebox_asm::rt::Runtime"]]]],["tiny_vm",[["impl Freeze for TinyInsn",1,["tiny_vm::TinyInsn"]],["impl Freeze for TinyReg",1,["tiny_vm::TinyReg"]],["impl Freeze for Fixup",1,["tiny_vm::Fixup"]],["impl Freeze for PhysAddr",1,["tiny_vm::PhysAddr"]],["impl Freeze for TinyVm",1,["tiny_vm::TinyVm"]]]]]); if (window.register_implementors) { window.register_implementors(implementors); } else { window.pending_implementors = implementors; } })() -//{"start":57,"fragment_lengths":[4624,1388]} \ No newline at end of file +//{"start":57,"fragment_lengths":[4333,1388]} \ No newline at end of file diff --git a/trait.impl/core/marker/trait.Send.js b/trait.impl/core/marker/trait.Send.js index 9069da9..8c3eded 100644 --- a/trait.impl/core/marker/trait.Send.js +++ b/trait.impl/core/marker/trait.Send.js @@ -1,9 +1,9 @@ (function() { - var implementors = Object.fromEntries([["juicebox_asm",[["impl !Send for Runtime",1,["juicebox_asm::rt::Runtime"]],["impl Send for MemOp",1,["juicebox_asm::MemOp"]],["impl Send for Reg16",1,["juicebox_asm::reg::Reg16"]],["impl Send for Reg32",1,["juicebox_asm::reg::Reg32"]],["impl Send for Reg64",1,["juicebox_asm::reg::Reg64"]],["impl Send for Reg8",1,["juicebox_asm::reg::Reg8"]],["impl Send for Asm",1,["juicebox_asm::asm::Asm"]],["impl Send for Imm16",1,["juicebox_asm::imm::Imm16"]],["impl Send for Imm32",1,["juicebox_asm::imm::Imm32"]],["impl Send for Imm64",1,["juicebox_asm::imm::Imm64"]],["impl Send for Imm8",1,["juicebox_asm::imm::Imm8"]],["impl Send for Label",1,["juicebox_asm::label::Label"]],["impl Send for MemOp16",1,["juicebox_asm::MemOp16"]],["impl Send for MemOp32",1,["juicebox_asm::MemOp32"]],["impl Send for MemOp64",1,["juicebox_asm::MemOp64"]],["impl Send for MemOp8",1,["juicebox_asm::MemOp8"]]]],["tiny_vm",[["impl !Send for TinyVm",1,["tiny_vm::TinyVm"]],["impl Send for TinyInsn",1,["tiny_vm::TinyInsn"]],["impl Send for TinyReg",1,["tiny_vm::TinyReg"]],["impl Send for Fixup",1,["tiny_vm::Fixup"]],["impl Send for PhysAddr",1,["tiny_vm::PhysAddr"]]]]]); + var implementors = Object.fromEntries([["juicebox_asm",[["impl !Send for Runtime",1,["juicebox_asm::rt::Runtime"]],["impl Send for Reg16",1,["juicebox_asm::reg::Reg16"]],["impl Send for Reg32",1,["juicebox_asm::reg::Reg32"]],["impl Send for Reg64",1,["juicebox_asm::reg::Reg64"]],["impl Send for Reg8",1,["juicebox_asm::reg::Reg8"]],["impl Send for Asm",1,["juicebox_asm::asm::Asm"]],["impl Send for Imm16",1,["juicebox_asm::imm::Imm16"]],["impl Send for Imm32",1,["juicebox_asm::imm::Imm32"]],["impl Send for Imm64",1,["juicebox_asm::imm::Imm64"]],["impl Send for Imm8",1,["juicebox_asm::imm::Imm8"]],["impl Send for Label",1,["juicebox_asm::label::Label"]],["impl Send for Mem16",1,["juicebox_asm::mem::Mem16"]],["impl Send for Mem32",1,["juicebox_asm::mem::Mem32"]],["impl Send for Mem64",1,["juicebox_asm::mem::Mem64"]],["impl Send for Mem8",1,["juicebox_asm::mem::Mem8"]]]],["tiny_vm",[["impl !Send for TinyVm",1,["tiny_vm::TinyVm"]],["impl Send for TinyInsn",1,["tiny_vm::TinyInsn"]],["impl Send for TinyReg",1,["tiny_vm::TinyReg"]],["impl Send for Fixup",1,["tiny_vm::Fixup"]],["impl Send for PhysAddr",1,["tiny_vm::PhysAddr"]]]]]); if (window.register_implementors) { window.register_implementors(implementors); } else { window.pending_implementors = implementors; } })() -//{"start":57,"fragment_lengths":[4529,1359]} \ No newline at end of file +//{"start":57,"fragment_lengths":[4244,1359]} \ No newline at end of file diff --git a/trait.impl/core/marker/trait.Sync.js b/trait.impl/core/marker/trait.Sync.js index fab9daa..04e595f 100644 --- a/trait.impl/core/marker/trait.Sync.js +++ b/trait.impl/core/marker/trait.Sync.js @@ -1,9 +1,9 @@ (function() { - var implementors = Object.fromEntries([["juicebox_asm",[["impl !Sync for Runtime",1,["juicebox_asm::rt::Runtime"]],["impl Sync for MemOp",1,["juicebox_asm::MemOp"]],["impl Sync for Reg16",1,["juicebox_asm::reg::Reg16"]],["impl Sync for Reg32",1,["juicebox_asm::reg::Reg32"]],["impl Sync for Reg64",1,["juicebox_asm::reg::Reg64"]],["impl Sync for Reg8",1,["juicebox_asm::reg::Reg8"]],["impl Sync for Asm",1,["juicebox_asm::asm::Asm"]],["impl Sync for Imm16",1,["juicebox_asm::imm::Imm16"]],["impl Sync for Imm32",1,["juicebox_asm::imm::Imm32"]],["impl Sync for Imm64",1,["juicebox_asm::imm::Imm64"]],["impl Sync for Imm8",1,["juicebox_asm::imm::Imm8"]],["impl Sync for Label",1,["juicebox_asm::label::Label"]],["impl Sync for MemOp16",1,["juicebox_asm::MemOp16"]],["impl Sync for MemOp32",1,["juicebox_asm::MemOp32"]],["impl Sync for MemOp64",1,["juicebox_asm::MemOp64"]],["impl Sync for MemOp8",1,["juicebox_asm::MemOp8"]]]],["tiny_vm",[["impl !Sync for TinyVm",1,["tiny_vm::TinyVm"]],["impl Sync for TinyInsn",1,["tiny_vm::TinyInsn"]],["impl Sync for TinyReg",1,["tiny_vm::TinyReg"]],["impl Sync for Fixup",1,["tiny_vm::Fixup"]],["impl Sync for PhysAddr",1,["tiny_vm::PhysAddr"]]]]]); + var implementors = Object.fromEntries([["juicebox_asm",[["impl !Sync for Runtime",1,["juicebox_asm::rt::Runtime"]],["impl Sync for Reg16",1,["juicebox_asm::reg::Reg16"]],["impl Sync for Reg32",1,["juicebox_asm::reg::Reg32"]],["impl Sync for Reg64",1,["juicebox_asm::reg::Reg64"]],["impl Sync for Reg8",1,["juicebox_asm::reg::Reg8"]],["impl Sync for Asm",1,["juicebox_asm::asm::Asm"]],["impl Sync for Imm16",1,["juicebox_asm::imm::Imm16"]],["impl Sync for Imm32",1,["juicebox_asm::imm::Imm32"]],["impl Sync for Imm64",1,["juicebox_asm::imm::Imm64"]],["impl Sync for Imm8",1,["juicebox_asm::imm::Imm8"]],["impl Sync for Label",1,["juicebox_asm::label::Label"]],["impl Sync for Mem16",1,["juicebox_asm::mem::Mem16"]],["impl Sync for Mem32",1,["juicebox_asm::mem::Mem32"]],["impl Sync for Mem64",1,["juicebox_asm::mem::Mem64"]],["impl Sync for Mem8",1,["juicebox_asm::mem::Mem8"]]]],["tiny_vm",[["impl !Sync for TinyVm",1,["tiny_vm::TinyVm"]],["impl Sync for TinyInsn",1,["tiny_vm::TinyInsn"]],["impl Sync for TinyReg",1,["tiny_vm::TinyReg"]],["impl Sync for Fixup",1,["tiny_vm::Fixup"]],["impl Sync for PhysAddr",1,["tiny_vm::PhysAddr"]]]]]); if (window.register_implementors) { window.register_implementors(implementors); } else { window.pending_implementors = implementors; } })() -//{"start":57,"fragment_lengths":[4529,1359]} \ No newline at end of file +//{"start":57,"fragment_lengths":[4244,1359]} \ No newline at end of file diff --git a/trait.impl/core/marker/trait.Unpin.js b/trait.impl/core/marker/trait.Unpin.js index 50a7624..d773a9b 100644 --- a/trait.impl/core/marker/trait.Unpin.js +++ b/trait.impl/core/marker/trait.Unpin.js @@ -1,9 +1,9 @@ (function() { - var implementors = Object.fromEntries([["juicebox_asm",[["impl Unpin for MemOp",1,["juicebox_asm::MemOp"]],["impl Unpin for Reg16",1,["juicebox_asm::reg::Reg16"]],["impl Unpin for Reg32",1,["juicebox_asm::reg::Reg32"]],["impl Unpin for Reg64",1,["juicebox_asm::reg::Reg64"]],["impl Unpin for Reg8",1,["juicebox_asm::reg::Reg8"]],["impl Unpin for Asm",1,["juicebox_asm::asm::Asm"]],["impl Unpin for Imm16",1,["juicebox_asm::imm::Imm16"]],["impl Unpin for Imm32",1,["juicebox_asm::imm::Imm32"]],["impl Unpin for Imm64",1,["juicebox_asm::imm::Imm64"]],["impl Unpin for Imm8",1,["juicebox_asm::imm::Imm8"]],["impl Unpin for Label",1,["juicebox_asm::label::Label"]],["impl Unpin for MemOp16",1,["juicebox_asm::MemOp16"]],["impl Unpin for MemOp32",1,["juicebox_asm::MemOp32"]],["impl Unpin for MemOp64",1,["juicebox_asm::MemOp64"]],["impl Unpin for MemOp8",1,["juicebox_asm::MemOp8"]],["impl Unpin for Runtime",1,["juicebox_asm::rt::Runtime"]]]],["tiny_vm",[["impl Unpin for TinyInsn",1,["tiny_vm::TinyInsn"]],["impl Unpin for TinyReg",1,["tiny_vm::TinyReg"]],["impl Unpin for Fixup",1,["tiny_vm::Fixup"]],["impl Unpin for PhysAddr",1,["tiny_vm::PhysAddr"]],["impl Unpin for TinyVm",1,["tiny_vm::TinyVm"]]]]]); + var implementors = Object.fromEntries([["juicebox_asm",[["impl Unpin for Reg16",1,["juicebox_asm::reg::Reg16"]],["impl Unpin for Reg32",1,["juicebox_asm::reg::Reg32"]],["impl Unpin for Reg64",1,["juicebox_asm::reg::Reg64"]],["impl Unpin for Reg8",1,["juicebox_asm::reg::Reg8"]],["impl Unpin for Asm",1,["juicebox_asm::asm::Asm"]],["impl Unpin for Imm16",1,["juicebox_asm::imm::Imm16"]],["impl Unpin for Imm32",1,["juicebox_asm::imm::Imm32"]],["impl Unpin for Imm64",1,["juicebox_asm::imm::Imm64"]],["impl Unpin for Imm8",1,["juicebox_asm::imm::Imm8"]],["impl Unpin for Label",1,["juicebox_asm::label::Label"]],["impl Unpin for Mem16",1,["juicebox_asm::mem::Mem16"]],["impl Unpin for Mem32",1,["juicebox_asm::mem::Mem32"]],["impl Unpin for Mem64",1,["juicebox_asm::mem::Mem64"]],["impl Unpin for Mem8",1,["juicebox_asm::mem::Mem8"]],["impl Unpin for Runtime",1,["juicebox_asm::rt::Runtime"]]]],["tiny_vm",[["impl Unpin for TinyInsn",1,["tiny_vm::TinyInsn"]],["impl Unpin for TinyReg",1,["tiny_vm::TinyReg"]],["impl Unpin for Fixup",1,["tiny_vm::Fixup"]],["impl Unpin for PhysAddr",1,["tiny_vm::PhysAddr"]],["impl Unpin for TinyVm",1,["tiny_vm::TinyVm"]]]]]); if (window.register_implementors) { window.register_implementors(implementors); } else { window.pending_implementors = implementors; } })() -//{"start":57,"fragment_lengths":[4576,1373]} \ No newline at end of file +//{"start":57,"fragment_lengths":[4288,1373]} \ No newline at end of file diff --git a/trait.impl/core/panic/unwind_safe/trait.RefUnwindSafe.js b/trait.impl/core/panic/unwind_safe/trait.RefUnwindSafe.js index 696ddbb..6d20e2d 100644 --- a/trait.impl/core/panic/unwind_safe/trait.RefUnwindSafe.js +++ b/trait.impl/core/panic/unwind_safe/trait.RefUnwindSafe.js @@ -1,9 +1,9 @@ (function() { - var implementors = Object.fromEntries([["juicebox_asm",[["impl RefUnwindSafe for MemOp",1,["juicebox_asm::MemOp"]],["impl RefUnwindSafe for Reg16",1,["juicebox_asm::reg::Reg16"]],["impl RefUnwindSafe for Reg32",1,["juicebox_asm::reg::Reg32"]],["impl RefUnwindSafe for Reg64",1,["juicebox_asm::reg::Reg64"]],["impl RefUnwindSafe for Reg8",1,["juicebox_asm::reg::Reg8"]],["impl RefUnwindSafe for Asm",1,["juicebox_asm::asm::Asm"]],["impl RefUnwindSafe for Imm16",1,["juicebox_asm::imm::Imm16"]],["impl RefUnwindSafe for Imm32",1,["juicebox_asm::imm::Imm32"]],["impl RefUnwindSafe for Imm64",1,["juicebox_asm::imm::Imm64"]],["impl RefUnwindSafe for Imm8",1,["juicebox_asm::imm::Imm8"]],["impl RefUnwindSafe for Label",1,["juicebox_asm::label::Label"]],["impl RefUnwindSafe for MemOp16",1,["juicebox_asm::MemOp16"]],["impl RefUnwindSafe for MemOp32",1,["juicebox_asm::MemOp32"]],["impl RefUnwindSafe for MemOp64",1,["juicebox_asm::MemOp64"]],["impl RefUnwindSafe for MemOp8",1,["juicebox_asm::MemOp8"]],["impl RefUnwindSafe for Runtime",1,["juicebox_asm::rt::Runtime"]]]],["tiny_vm",[["impl RefUnwindSafe for TinyInsn",1,["tiny_vm::TinyInsn"]],["impl RefUnwindSafe for TinyReg",1,["tiny_vm::TinyReg"]],["impl RefUnwindSafe for Fixup",1,["tiny_vm::Fixup"]],["impl RefUnwindSafe for PhysAddr",1,["tiny_vm::PhysAddr"]],["impl RefUnwindSafe for TinyVm",1,["tiny_vm::TinyVm"]]]]]); + var implementors = Object.fromEntries([["juicebox_asm",[["impl RefUnwindSafe for Reg16",1,["juicebox_asm::reg::Reg16"]],["impl RefUnwindSafe for Reg32",1,["juicebox_asm::reg::Reg32"]],["impl RefUnwindSafe for Reg64",1,["juicebox_asm::reg::Reg64"]],["impl RefUnwindSafe for Reg8",1,["juicebox_asm::reg::Reg8"]],["impl RefUnwindSafe for Asm",1,["juicebox_asm::asm::Asm"]],["impl RefUnwindSafe for Imm16",1,["juicebox_asm::imm::Imm16"]],["impl RefUnwindSafe for Imm32",1,["juicebox_asm::imm::Imm32"]],["impl RefUnwindSafe for Imm64",1,["juicebox_asm::imm::Imm64"]],["impl RefUnwindSafe for Imm8",1,["juicebox_asm::imm::Imm8"]],["impl RefUnwindSafe for Label",1,["juicebox_asm::label::Label"]],["impl RefUnwindSafe for Mem16",1,["juicebox_asm::mem::Mem16"]],["impl RefUnwindSafe for Mem32",1,["juicebox_asm::mem::Mem32"]],["impl RefUnwindSafe for Mem64",1,["juicebox_asm::mem::Mem64"]],["impl RefUnwindSafe for Mem8",1,["juicebox_asm::mem::Mem8"]],["impl RefUnwindSafe for Runtime",1,["juicebox_asm::rt::Runtime"]]]],["tiny_vm",[["impl RefUnwindSafe for TinyInsn",1,["tiny_vm::TinyInsn"]],["impl RefUnwindSafe for TinyReg",1,["tiny_vm::TinyReg"]],["impl RefUnwindSafe for Fixup",1,["tiny_vm::Fixup"]],["impl RefUnwindSafe for PhysAddr",1,["tiny_vm::PhysAddr"]],["impl RefUnwindSafe for TinyVm",1,["tiny_vm::TinyVm"]]]]]); if (window.register_implementors) { window.register_implementors(implementors); } else { window.pending_implementors = implementors; } })() -//{"start":57,"fragment_lengths":[5328,1608]} \ No newline at end of file +//{"start":57,"fragment_lengths":[4993,1608]} \ No newline at end of file diff --git a/trait.impl/core/panic/unwind_safe/trait.UnwindSafe.js b/trait.impl/core/panic/unwind_safe/trait.UnwindSafe.js index 62108b6..c73d2c6 100644 --- a/trait.impl/core/panic/unwind_safe/trait.UnwindSafe.js +++ b/trait.impl/core/panic/unwind_safe/trait.UnwindSafe.js @@ -1,9 +1,9 @@ (function() { - var implementors = Object.fromEntries([["juicebox_asm",[["impl UnwindSafe for MemOp",1,["juicebox_asm::MemOp"]],["impl UnwindSafe for Reg16",1,["juicebox_asm::reg::Reg16"]],["impl UnwindSafe for Reg32",1,["juicebox_asm::reg::Reg32"]],["impl UnwindSafe for Reg64",1,["juicebox_asm::reg::Reg64"]],["impl UnwindSafe for Reg8",1,["juicebox_asm::reg::Reg8"]],["impl UnwindSafe for Asm",1,["juicebox_asm::asm::Asm"]],["impl UnwindSafe for Imm16",1,["juicebox_asm::imm::Imm16"]],["impl UnwindSafe for Imm32",1,["juicebox_asm::imm::Imm32"]],["impl UnwindSafe for Imm64",1,["juicebox_asm::imm::Imm64"]],["impl UnwindSafe for Imm8",1,["juicebox_asm::imm::Imm8"]],["impl UnwindSafe for Label",1,["juicebox_asm::label::Label"]],["impl UnwindSafe for MemOp16",1,["juicebox_asm::MemOp16"]],["impl UnwindSafe for MemOp32",1,["juicebox_asm::MemOp32"]],["impl UnwindSafe for MemOp64",1,["juicebox_asm::MemOp64"]],["impl UnwindSafe for MemOp8",1,["juicebox_asm::MemOp8"]],["impl UnwindSafe for Runtime",1,["juicebox_asm::rt::Runtime"]]]],["tiny_vm",[["impl UnwindSafe for TinyInsn",1,["tiny_vm::TinyInsn"]],["impl UnwindSafe for TinyReg",1,["tiny_vm::TinyReg"]],["impl UnwindSafe for Fixup",1,["tiny_vm::Fixup"]],["impl UnwindSafe for PhysAddr",1,["tiny_vm::PhysAddr"]],["impl UnwindSafe for TinyVm",1,["tiny_vm::TinyVm"]]]]]); + var implementors = Object.fromEntries([["juicebox_asm",[["impl UnwindSafe for Reg16",1,["juicebox_asm::reg::Reg16"]],["impl UnwindSafe for Reg32",1,["juicebox_asm::reg::Reg32"]],["impl UnwindSafe for Reg64",1,["juicebox_asm::reg::Reg64"]],["impl UnwindSafe for Reg8",1,["juicebox_asm::reg::Reg8"]],["impl UnwindSafe for Asm",1,["juicebox_asm::asm::Asm"]],["impl UnwindSafe for Imm16",1,["juicebox_asm::imm::Imm16"]],["impl UnwindSafe for Imm32",1,["juicebox_asm::imm::Imm32"]],["impl UnwindSafe for Imm64",1,["juicebox_asm::imm::Imm64"]],["impl UnwindSafe for Imm8",1,["juicebox_asm::imm::Imm8"]],["impl UnwindSafe for Label",1,["juicebox_asm::label::Label"]],["impl UnwindSafe for Mem16",1,["juicebox_asm::mem::Mem16"]],["impl UnwindSafe for Mem32",1,["juicebox_asm::mem::Mem32"]],["impl UnwindSafe for Mem64",1,["juicebox_asm::mem::Mem64"]],["impl UnwindSafe for Mem8",1,["juicebox_asm::mem::Mem8"]],["impl UnwindSafe for Runtime",1,["juicebox_asm::rt::Runtime"]]]],["tiny_vm",[["impl UnwindSafe for TinyInsn",1,["tiny_vm::TinyInsn"]],["impl UnwindSafe for TinyReg",1,["tiny_vm::TinyReg"]],["impl UnwindSafe for Fixup",1,["tiny_vm::Fixup"]],["impl UnwindSafe for PhysAddr",1,["tiny_vm::PhysAddr"]],["impl UnwindSafe for TinyVm",1,["tiny_vm::TinyVm"]]]]]); if (window.register_implementors) { window.register_implementors(implementors); } else { window.pending_implementors = implementors; } })() -//{"start":57,"fragment_lengths":[5184,1563]} \ No newline at end of file +//{"start":57,"fragment_lengths":[4858,1563]} \ No newline at end of file -- cgit v1.2.3