From 758f014afb8ec5c20ef2fc862fc12e80f65d3d25 Mon Sep 17 00:00:00 2001 From: Johannes Stoelp Date: Fri, 13 Dec 2024 01:13:20 +0100 Subject: mem: make all memory operands explicit in size * remove non size explicit MemOp * introduce private Mem trait * implement Mem8, Mem16, Mem32 and Mem64 operands * implement EncodeX helpers based on explicit memory operands * fixup instructions with explicit memory operands * fixup examples --- examples/tiny_vm.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'examples/tiny_vm.rs') diff --git a/examples/tiny_vm.rs b/examples/tiny_vm.rs index 1f4c653..7b40063 100644 --- a/examples/tiny_vm.rs +++ b/examples/tiny_vm.rs @@ -38,7 +38,7 @@ use juicebox_asm::insn::*; use juicebox_asm::Runtime; -use juicebox_asm::{Asm, Imm16, Imm64, MemOp, Reg16, Reg64}; +use juicebox_asm::{Asm, Imm16, Imm64, Mem16, Reg16, Reg64}; /// A guest physical address. pub struct PhysAddr(pub u16); @@ -285,11 +285,11 @@ impl TinyVm { // Generate memory operand into regs for guest register. let reg_op = |r: TinyReg| { - MemOp::IndirectDisp(Reg64::rdi, (r.idx() * 2).try_into().expect("only 3 regs")) + Mem16::indirect_disp(Reg64::rdi, (r.idx() * 2).try_into().expect("only 3 regs")) }; // Generate memory operand into dmem for guest phys address. - let mem_op = |paddr: u16| MemOp::IndirectDisp(Reg64::rsi, paddr.into()); + let mem_op = |paddr: u16| Mem16::indirect_disp(Reg64::rsi, paddr.into()); // Compute instructions in translated basic block. let bb_icnt = || -> u64 { (pc - self.pc).try_into().unwrap() }; -- cgit v1.2.3