From 36345d8ab93d23d9f94372863e3747a07222b6ce Mon Sep 17 00:00:00 2001 From: Johannes Stoelp Date: Fri, 6 Dec 2024 22:17:01 +0100 Subject: asm: add inc, xor insn and initial support for memory base+idx --- src/insn/add.rs | 12 ++++++++++++ src/insn/inc.rs | 14 ++++++++++++++ src/insn/xor.rs | 8 ++++++++ 3 files changed, 34 insertions(+) create mode 100644 src/insn/inc.rs create mode 100644 src/insn/xor.rs (limited to 'src/insn') diff --git a/src/insn/add.rs b/src/insn/add.rs index b8fe96c..d5312be 100644 --- a/src/insn/add.rs +++ b/src/insn/add.rs @@ -13,6 +13,12 @@ impl Add for Asm { } } +impl Add for Asm { + fn add(&mut self, op1: MemOp, op2: Reg64) { + self.encode_mr(0x01, op1, op2); + } +} + impl Add for Asm { fn add(&mut self, op1: MemOp, op2: Reg16) { self.encode_mr(0x01, op1, op2); @@ -24,3 +30,9 @@ impl Add for Asm { self.encode_mi(0x81, 0, op1, op2); } } + +impl Add for Asm { + fn add(&mut self, op1: Reg64, op2: MemOp) { + self.encode_rm(0x03, op1, op2); + } +} diff --git a/src/insn/inc.rs b/src/insn/inc.rs new file mode 100644 index 0000000..ede780a --- /dev/null +++ b/src/insn/inc.rs @@ -0,0 +1,14 @@ +use super::Inc; +use crate::{Asm, Reg32, Reg64}; + +impl Inc for Asm { + fn inc(&mut self, op1: Reg64) { + self.encode_r(0xff, 0, op1); + } +} + +impl Inc for Asm { + fn inc(&mut self, op1: Reg32) { + self.encode_r(0xff, 0, op1); + } +} diff --git a/src/insn/xor.rs b/src/insn/xor.rs new file mode 100644 index 0000000..b1fdc48 --- /dev/null +++ b/src/insn/xor.rs @@ -0,0 +1,8 @@ +use super::Xor; +use crate::{Asm, Reg64}; + +impl Xor for Asm { + fn xor(&mut self, op1: Reg64, op2: Reg64) { + self.encode_rr(&[0x31], op1, op2); + } +} -- cgit v1.2.3