From 3f47ede3d0a1aaf3a9176ab9c93b8d0e970388f2 Mon Sep 17 00:00:00 2001
From: Johannes Stoelp <johannes.stoelp@gmail.com>
Date: Tue, 5 Dec 2023 00:56:58 +0100
Subject: insn: add additional insn required for the new tiny_vm example

---
 src/insn/add.rs  | 12 ++++++++++++
 src/insn/cmp.rs  |  7 +++++++
 src/insn/mov.rs  |  8 ++++++++
 src/insn/test.rs |  6 ++++++
 4 files changed, 33 insertions(+)
 create mode 100644 src/insn/cmp.rs

(limited to 'src/insn')

diff --git a/src/insn/add.rs b/src/insn/add.rs
index 3757d14..8232fe4 100644
--- a/src/insn/add.rs
+++ b/src/insn/add.rs
@@ -11,3 +11,15 @@ impl Add<Reg32, Reg32> for Asm {
         self.encode_rr(0x01, op1, op2);
     }
 }
+
+impl Add<MemOp, Reg16> for Asm {
+    fn add(&mut self, op1: MemOp, op2: Reg16) {
+        self.encode_mr(0x01, op1, op2);
+    }
+}
+
+impl Add<MemOp, Imm16> for Asm {
+    fn add(&mut self, op1: MemOp, op2: Imm16) {
+        self.encode_mi(0x81, 0, op1, op2);
+    }
+}
diff --git a/src/insn/cmp.rs b/src/insn/cmp.rs
new file mode 100644
index 0000000..93aa26c
--- /dev/null
+++ b/src/insn/cmp.rs
@@ -0,0 +1,7 @@
+use crate::prelude::*;
+
+impl Cmp<MemOp, Imm16> for Asm {
+    fn cmp(&mut self, op1: MemOp, op2: Imm16) {
+        self.encode_mi(0x81, 0x7, op1, op2);
+    }
+}
diff --git a/src/insn/mov.rs b/src/insn/mov.rs
index bf1c33e..2614d82 100644
--- a/src/insn/mov.rs
+++ b/src/insn/mov.rs
@@ -103,3 +103,11 @@ impl Mov<Reg8, Imm8> for Asm {
         self.encode_oi(0xb0, op1, op2);
     }
 }
+
+// -- MOV : mem imm
+
+impl Mov<MemOp, Imm16> for Asm {
+    fn mov(&mut self, op1: MemOp, op2: Imm16) {
+        self.encode_mi(0xc7, 0, op1, op2);
+    }
+}
diff --git a/src/insn/test.rs b/src/insn/test.rs
index 25f1680..b7ac774 100644
--- a/src/insn/test.rs
+++ b/src/insn/test.rs
@@ -11,3 +11,9 @@ impl Test<Reg32, Reg32> for Asm {
         self.encode_rr(0x85, op1, op2);
     }
 }
+
+impl Test<MemOp, Imm16> for Asm {
+    fn test(&mut self, op1: MemOp, op2: Imm16) {
+        self.encode_mi(0xf7, 0, op1, op2);
+    }
+}
-- 
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