1
+2
+3
+4
+5
+6
+7
+8
+9
+10
+11
+12
+13
+14
+15
+16
+17
+18
+19
+20
+21
+22
+23
+24
+25
+26
+27
+28
+29
+30
+31
+32
+33
+34
+35
+36
+37
+38
+39
+40
+41
+42
+43
+44
+45
+46
+47
+48
+49
+50
+51
+52
+53
+54
+55
+56
+57
+58
+59
+60
+61
+62
+63
+64
+65
+66
+67
+68
+69
+70
+71
+72
+73
+74
+75
+76
+77
+78
+79
+80
+81
+82
+83
+84
+85
+86
+87
+88
+89
+90
+91
+92
+93
+94
+95
+96
+97
+98
+99
+100
+101
+102
+103
+104
+105
+

use crate::prelude::*;
+
+// -- MOV : reg reg
+
+impl Mov<Reg64, Reg64> for Asm {
+    fn mov(&mut self, op1: Reg64, op2: Reg64) {
+        self.encode_rr(0x89, op1, op2);
+    }
+}
+
+impl Mov<Reg32, Reg32> for Asm {
+    fn mov(&mut self, op1: Reg32, op2: Reg32) {
+        self.encode_rr(0x89, op1, op2);
+    }
+}
+
+impl Mov<Reg16, Reg16> for Asm {
+    fn mov(&mut self, op1: Reg16, op2: Reg16) {
+        self.encode_rr(0x89, op1, op2);
+    }
+}
+
+impl Mov<Reg8, Reg8> for Asm {
+    fn mov(&mut self, op1: Reg8, op2: Reg8) {
+        self.encode_rr(0x88, op1, op2);
+    }
+}
+
+// -- MOV : mem reg
+
+impl Mov<MemOp, Reg64> for Asm {
+    fn mov(&mut self, op1: MemOp, op2: Reg64) {
+        self.encode_mr(0x89, op1, op2);
+    }
+}
+
+impl Mov<MemOp, Reg32> for Asm {
+    fn mov(&mut self, op1: MemOp, op2: Reg32) {
+        self.encode_mr(0x89, op1, op2);
+    }
+}
+
+impl Mov<MemOp, Reg16> for Asm {
+    fn mov(&mut self, op1: MemOp, op2: Reg16) {
+        self.encode_mr(0x89, op1, op2);
+    }
+}
+
+impl Mov<MemOp, Reg8> for Asm {
+    fn mov(&mut self, op1: MemOp, op2: Reg8) {
+        self.encode_mr(0x88, op1, op2);
+    }
+}
+
+// -- MOV : reg mem
+
+impl Mov<Reg64, MemOp> for Asm {
+    fn mov(&mut self, op1: Reg64, op2: MemOp) {
+        self.encode_rm(0x8b, op1, op2);
+    }
+}
+
+impl Mov<Reg32, MemOp> for Asm {
+    fn mov(&mut self, op1: Reg32, op2: MemOp) {
+        self.encode_rm(0x8b, op1, op2);
+    }
+}
+
+impl Mov<Reg16, MemOp> for Asm {
+    fn mov(&mut self, op1: Reg16, op2: MemOp) {
+        self.encode_rm(0x8b, op1, op2);
+    }
+}
+
+impl Mov<Reg8, MemOp> for Asm {
+    fn mov(&mut self, op1: Reg8, op2: MemOp) {
+        self.encode_rm(0x8a, op1, op2);
+    }
+}
+
+// -- MOV : reg imm
+
+impl Mov<Reg64, Imm64> for Asm {
+    fn mov(&mut self, op1: Reg64, op2: Imm64) {
+        self.encode_oi(0xb8, op1, op2);
+    }
+}
+
+impl Mov<Reg32, Imm32> for Asm {
+    fn mov(&mut self, op1: Reg32, op2: Imm32) {
+        self.encode_oi(0xb8, op1, op2);
+    }
+}
+
+impl Mov<Reg16, Imm16> for Asm {
+    fn mov(&mut self, op1: Reg16, op2: Imm16) {
+        self.encode_oi(0xb8, op1, op2);
+    }
+}
+
+impl Mov<Reg8, Imm8> for Asm {
+    fn mov(&mut self, op1: Reg8, op2: Imm8) {
+        self.encode_oi(0xb0, op1, op2);
+    }
+}
+

+