From 865c1d3231fd57c648121d961be91793d0bfe690 Mon Sep 17 00:00:00 2001 From: johannst Date: Sun, 5 Mar 2023 20:47:28 +0000 Subject: deploy: 1ea7de2ba46b58b4afe3e65b95d8a45160218a5c --- src/juicebox_asm/reg.rs.html | 46 ++++++++++++++++++++++++++++++++------------ 1 file changed, 34 insertions(+), 12 deletions(-) (limited to 'src/juicebox_asm/reg.rs.html') diff --git a/src/juicebox_asm/reg.rs.html b/src/juicebox_asm/reg.rs.html index 65ff29e..8791ddb 100644 --- a/src/juicebox_asm/reg.rs.html +++ b/src/juicebox_asm/reg.rs.html @@ -321,7 +321,20 @@ 321 322 323 -
/// Trait to interact with register operands.
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+
//! Definition of registers which are used as input operands for various instructions.
+
+/// Trait to interact with register operands.
 pub(crate) trait Reg {
     /// Get the raw x64 register code.
     fn idx(&self) -> u8;
@@ -358,10 +371,10 @@
     }
 }
 
-macro_rules! impl_reg {
-    (ENUM_ONLY, $name:ident, { $($reg:ident),+ $(,)? }) => {
-        /// General purpose register operands.
-        #[allow(non_camel_case_types)]
+macro_rules! enum_reg {
+    (#[$doc:meta]  $name:ident, { $($reg:ident),+ $(,)? }) => {
+        #[$doc]
+        #[allow(non_camel_case_types)]
         #[derive(Copy, Clone)]
         #[repr(u8)]
         pub enum $name {
@@ -376,9 +389,11 @@
             }
         }
     };
+}
 
-    ($name:ident, $rexw:expr, { $($reg:ident),+ $(,)? }) => {
-        impl_reg!(ENUM_ONLY, $name, { $( $reg, )+ });
+macro_rules! impl_reg {
+    (#[$doc:meta] $name:ident, $rexw:expr, { $($reg:ident),+ $(,)? }) => {
+        enum_reg!(#[$doc] $name, { $( $reg, )+ });
 
         impl Reg for $name {
             /// Get the raw x64 register code.
@@ -394,11 +409,18 @@
     }
 }
 
-impl_reg!(Reg64, true,  { rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi, r8,  r9,  r10,  r11,  r12,  r13,  r14,  r15  });
-impl_reg!(Reg32, false, { eax, ecx, edx, ebx, esp, ebp, esi, edi, r8d, r9d, r10d, r11d, r12d, r13d, r14d, r15d });
-impl_reg!(Reg16, false, { ax,  cx,  dx,  bx,  sp,  bp,  si,  di,  r8w, r9w, r10w, r11w, r12w, r13w, r14w, r15w });
-impl_reg!(ENUM_ONLY,
-          Reg8,         { al,  cl,  dl,  bl,  spl, bpl, sil, dil, r8l, r9l, r10l, r11l, r12l, r13l, r14l, r15l,
+impl_reg!(
+    /// Definition of 64 bit registers.
+    Reg64, true,  { rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi, r8,  r9,  r10,  r11,  r12,  r13,  r14,  r15  });
+impl_reg!(
+    /// Definition of 32 bit registers.
+    Reg32, false, { eax, ecx, edx, ebx, esp, ebp, esi, edi, r8d, r9d, r10d, r11d, r12d, r13d, r14d, r15d });
+impl_reg!(
+    /// Definition of 16 bit registers.
+    Reg16, false, { ax,  cx,  dx,  bx,  sp,  bp,  si,  di,  r8w, r9w, r10w, r11w, r12w, r13w, r14w, r15w });
+enum_reg!(
+    /// Definition of 8 bit registers.
+    Reg8,         { al,  cl,  dl,  bl,  spl, bpl, sil, dil, r8l, r9l, r10l, r11l, r12l, r13l, r14l, r15l,
                           ah,  ch,  dh,  bh });
 
 impl Reg for Reg8 {
-- 
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