From 36345d8ab93d23d9f94372863e3747a07222b6ce Mon Sep 17 00:00:00 2001
From: Johannes Stoelp <johannes.stoelp@gmail.com>
Date: Fri, 6 Dec 2024 22:17:01 +0100
Subject: asm: add inc, xor insn and initial support for memory base+idx

---
 src/lib.rs | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

(limited to 'src/lib.rs')

diff --git a/src/lib.rs b/src/lib.rs
index 3b7b832..131440a 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -94,6 +94,9 @@ pub enum MemOp {
 
     /// An indirect memory operand with additional displacement, eg `mov [rax + 0x10], rcx`.
     IndirectDisp(Reg64, i32),
+
+    /// An indirect memory operand in the form base + index, eg `mov [rax + rcx], rdx`.
+    IndirectBaseIndex(Reg64, Reg64),
 }
 
 impl MemOp {
@@ -102,6 +105,21 @@ impl MemOp {
         match self {
             MemOp::Indirect(base) => *base,
             MemOp::IndirectDisp(base, ..) => *base,
+            MemOp::IndirectBaseIndex(base, ..) => *base,
+        }
+    }
+
+    /// Get the index register of the memory operand.
+    fn index(&self) -> Reg64 {
+        // Return zero index register for memory operands w/o index register.
+        let zero_index = Reg64::rax;
+        use reg::Reg;
+        assert_eq!(zero_index.idx(), 0);
+
+        match self {
+            MemOp::Indirect(..) => zero_index,
+            MemOp::IndirectDisp(..) => zero_index,
+            MemOp::IndirectBaseIndex(.., index) => *index,
         }
     }
 }
-- 
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