From 7c080806361e23e2e2a528fb391d6bf9c15404f0 Mon Sep 17 00:00:00 2001 From: Johannes Stoelp Date: Mon, 27 Feb 2023 20:32:32 +0100 Subject: Add MOV tests --- src/lib.rs | 43 +++++++++++++++++++++++++++++++++++++++++-- src/reg.rs | 39 ++++++++++++++++++++++----------------- 2 files changed, 63 insertions(+), 19 deletions(-) (limited to 'src') diff --git a/src/lib.rs b/src/lib.rs index 35f7919..23c9ca0 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -24,7 +24,8 @@ impl MemOp { } /// Encode the `REX` byte. -const fn rex(w: u8, r: u8, x: u8, b: u8) -> u8 { +const fn rex(w: bool, r: u8, x: u8, b: u8) -> u8 { + let w = if w { 1 } else { 0 }; let r = (r >> 3) & 1; let x = (x >> 3) & 1; let b = (b >> 3) & 1; @@ -227,7 +228,7 @@ trait EncodeMR { } fn rex(op1: &MemOp, op2: T) -> Option { - if op1.base().need_rex() || op2.need_rex() { + if op2.need_rex() || (op1.base().is_ext()) { Some(rex(op2.rexw(), op2.idx(), 0, op1.base().idx())) } else { None @@ -235,11 +236,19 @@ trait EncodeMR { } } +impl EncodeMR for Asm {} +impl EncodeMR for Asm { + fn legacy_prefix() -> Option { + Some(0x66) + } +} impl EncodeMR for Asm {} impl EncodeMR for Asm {} // -- Instruction implementations. +// -- MOV : reg reg + impl Mov for Asm { fn mov(&mut self, op1: Reg64, op2: Reg64) { self.encode_rr(0x89, op1, op2); @@ -264,6 +273,8 @@ impl Mov for Asm { } } +// -- MOV : mem reg + impl Mov for Asm { fn mov(&mut self, op1: MemOp, op2: Reg64) { self.encode_mr(0x89, op1, op2); @@ -276,6 +287,20 @@ impl Mov for Asm { } } +impl Mov for Asm { + fn mov(&mut self, op1: MemOp, op2: Reg16) { + self.encode_mr(0x89, op1, op2); + } +} + +impl Mov for Asm { + fn mov(&mut self, op1: MemOp, op2: Reg8) { + self.encode_mr(0x88, op1, op2); + } +} + +// -- MOV : reg mem + impl Mov for Asm { fn mov(&mut self, op1: Reg64, op2: MemOp) { self.encode_rm(0x8b, op1, op2); @@ -288,6 +313,20 @@ impl Mov for Asm { } } +impl Mov for Asm { + fn mov(&mut self, op1: Reg16, op2: MemOp) { + self.encode_rm(0x8b, op1, op2); + } +} + +impl Mov for Asm { + fn mov(&mut self, op1: Reg8, op2: MemOp) { + self.encode_rm(0x8a, op1, op2); + } +} + +// -- MOV : reg imm + impl Mov for Asm { fn mov(&mut self, op1: Reg64, op2: Imm64) { self.encode_oi(0xb8, op1, op2); diff --git a/src/reg.rs b/src/reg.rs index 149d04d..b349878 100644 --- a/src/reg.rs +++ b/src/reg.rs @@ -3,12 +3,17 @@ pub(crate) trait Reg { /// Get the raw x64 register code. fn idx(&self) -> u8; - /// Get the `REX.W` bit. - fn rexw(&self) -> u8; + /// Check if the registers needs the `REX.W` bit. + fn rexw(&self) -> bool; + + /// Check if the register is an extended registers. + fn is_ext(&self) -> bool { + self.idx() > 7 + } /// Check if the register requires a `REX` byte. fn need_rex(&self) -> bool { - self.idx() > 7 || self.rexw() > 0 + self.is_ext() || self.rexw() } /// Check if the register requires a `SIB` byte if used as addressing operand. @@ -58,20 +63,20 @@ macro_rules! impl_reg { *self as u8 } - /// Get the `REX.W` bit. - fn rexw(&self) -> u8 { + /// Check if the registers needs the `REX.W` bit. + fn rexw(&self) -> bool { $rexw } } } } -impl_reg!(Reg64, 1, { rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi, r8, r9, r10, r11, r12, r13, r14, r15 }); -impl_reg!(Reg32, 0, { eax, ecx, edx, ebx, esp, ebp, esi, edi, r8d, r9d, r10d, r11d, r12d, r13d, r14d, r15d }); -impl_reg!(Reg16, 0, { ax, cx, dx, bx, sp, bp, si, di, r8w, r9w, r10w, r11w, r12w, r13w, r14w, r15w }); +impl_reg!(Reg64, true, { rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi, r8, r9, r10, r11, r12, r13, r14, r15 }); +impl_reg!(Reg32, false, { eax, ecx, edx, ebx, esp, ebp, esi, edi, r8d, r9d, r10d, r11d, r12d, r13d, r14d, r15d }); +impl_reg!(Reg16, false, { ax, cx, dx, bx, sp, bp, si, di, r8w, r9w, r10w, r11w, r12w, r13w, r14w, r15w }); impl_reg!(ENUM_ONLY, - Reg8, { al, cl, dl, bl, spl, bpl, sil, dil, r8l, r9l, r10l, r11l, r12l, r13l, r14l, r15l, - ah, ch, dh, bh }); + Reg8, { al, cl, dl, bl, spl, bpl, sil, dil, r8l, r9l, r10l, r11l, r12l, r13l, r14l, r15l, + ah, ch, dh, bh }); impl Reg for Reg8 { /// Get the raw x64 register code. @@ -85,9 +90,9 @@ impl Reg for Reg8 { } } - /// Get the `REX.W` bit. - fn rexw(&self) -> u8 { - 0 + /// Check if the registers needs the `REX.W` bit. + fn rexw(&self) -> bool { + false } /// Check whether the gp register needs a `REX` prefix @@ -139,7 +144,7 @@ mod tests { assert_eq!(r.idx(), idx); // Check REX.W bit. - assert_eq!(r.rexw(), 0); + assert_eq!(r.rexw(), false); // Check need REX byte. let rex = match r { @@ -191,7 +196,7 @@ mod tests { assert_eq!(r.idx(), idx); // Check REX.W bit. - assert_eq!(r.rexw(), 0); + assert_eq!(r.rexw(), false); // Check need REX byte. let rex = match r { @@ -243,7 +248,7 @@ mod tests { assert_eq!(r.idx(), idx); // Check REX.W bit. - assert_eq!(r.rexw(), 0); + assert_eq!(r.rexw(), false); // Check need REX byte. let rex = match r { @@ -295,7 +300,7 @@ mod tests { assert_eq!(r.idx(), idx); // Check REX.W bit. - assert_eq!(r.rexw(), 1); + assert_eq!(r.rexw(), true); // Check need REX byte. assert_eq!(r.need_rex(), true); -- cgit v1.2.3