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class="src-sidebar-title"><h2>Files</h2></div></nav><div class="sidebar-resizer"></div><main><rustdoc-search></rustdoc-search><section id="main-content" class="content"><div class="main-heading"><h1><div class="sub-heading">juicebox_asm/</div>lib.rs</h1><rustdoc-toolbar></rustdoc-toolbar></div><div class="example-wrap"><div data-nosnippet><pre class="src-line-numbers"> <a href="#1" id="1">1</a> <a href="#2" id="2">2</a> <a href="#3" id="3">3</a> <a href="#4" id="4">4</a> <a href="#5" id="5">5</a> <a href="#6" id="6">6</a> <a href="#7" id="7">7</a> <a href="#8" id="8">8</a> <a href="#9" id="9">9</a> <a href="#10" id="10">10</a> <a href="#11" id="11">11</a> <a href="#12" id="12">12</a> <a href="#13" id="13">13</a> <a href="#14" id="14">14</a> <a href="#15" id="15">15</a> <a href="#16" id="16">16</a> <a href="#17" id="17">17</a> <a href="#18" id="18">18</a> <a href="#19" id="19">19</a> <a href="#20" id="20">20</a> <a href="#21" id="21">21</a> <a href="#22" id="22">22</a> <a href="#23" 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A simple `x64` jit assembler with a minimal runtime to execute emitted code for fun. //! //! The following is an fibonacci example implementation. //! ```rust //! use juicebox_asm::{Asm, Reg64, Imm64, Label}; //! use juicebox_asm::insn::*; //! use juicebox_asm::Runtime; //! //! const fn fib_rs(n: u64) -> u64 { //! match n { //! 0 => 0, //! 1 => 1, //! _ => fib_rs(n - 2) + fib_rs(n - 1), //! } //! } //! //! fn main() { //! let mut asm = Asm::new(); //! //! let mut lp = Label::new(); //! let mut end = Label::new(); //! //! // Reference implementation: //! // //! // int fib(int n) { //! // int tmp = 0; //! // int prv = 1; //! // int sum = 0; //! // loop: //! // if (n == 0) goto end; //! // tmp = sum; //! // sum += prv; //! // prv = tmp; //! // --n; //! // goto loop; //! // end: //! // return sum; //! // } //! //! // SystemV abi: //! // rdi -> first argument //! // rax -> return value //! let n = Reg64::rdi; //! let sum = Reg64::rax; //! //! let tmp = Reg64::rcx; //! let prv = Reg64::rbx; //! //! asm.mov(tmp, Imm64::from(0)); //! asm.mov(prv, Imm64::from(1)); //! asm.mov(sum, Imm64::from(0)); //! //! asm.bind(&mut lp); //! asm.test(n, n); //! asm.jz(&mut end); //! asm.mov(tmp, sum); //! asm.add(sum, prv); //! asm.mov(prv, tmp); //! asm.dec(n); //! asm.jmp(&mut lp); //! asm.bind(&mut end); //! asm.ret(); //! //! // Move code into executable page and get function pointer to it. //! let mut rt = Runtime::new(); //! let fib = unsafe { rt.add_code::<extern "C" fn(u64) -> u64>(&asm.into_code()) }; //! //! for n in 0..15 { //! let fib_jit = fib(n); //! println!("fib({}) = {}", n, fib_jit); //! assert_eq!(fib_jit, fib_rs(n)); //! } //! } //! ``` </span><span class="kw">mod </span>asm; <span class="kw">mod </span>imm; <span class="kw">mod </span>label; <span class="kw">mod </span>reg; <span class="kw">mod </span>rt; <span class="kw">pub mod </span>insn; <span class="kw">pub use </span>asm::Asm; <span class="kw">pub use </span>imm::{Imm16, Imm32, Imm64, Imm8}; <span class="kw">pub use </span>label::Label; <span class="kw">pub use </span>reg::{Reg16, Reg32, Reg64, Reg8}; <span class="kw">pub use </span>rt::Runtime; <span class="doccomment">/// Type representing a memory operand. </span><span class="attr">#[derive(Clone, Copy)] </span><span class="kw">pub enum </span>MemOp { <span class="doccomment">/// An indirect memory operand, eg `mov [rax], rcx`. </span>Indirect(Reg64), <span class="doccomment">/// An indirect memory operand with additional displacement, eg `mov [rax + 0x10], rcx`. </span>IndirectDisp(Reg64, i32), <span class="doccomment">/// An indirect memory operand in the form base + index, eg `mov [rax + rcx], rdx`. </span>IndirectBaseIndex(Reg64, Reg64), } <span class="kw">impl </span>MemOp { <span class="doccomment">/// Get the base address register of the memory operand. </span><span class="kw">const fn </span>base(<span class="kw-2">&</span><span class="self">self</span>) -> Reg64 { <span class="kw">match </span><span class="self">self </span>{ MemOp::Indirect(base) => <span class="kw-2">*</span>base, MemOp::IndirectDisp(base, ..) => <span class="kw-2">*</span>base, MemOp::IndirectBaseIndex(base, ..) => <span class="kw-2">*</span>base, } } <span class="doccomment">/// Get the index register of the memory operand. </span><span class="kw">fn </span>index(<span class="kw-2">&</span><span class="self">self</span>) -> Reg64 { <span class="comment">// Return zero index register for memory operands w/o index register. </span><span class="kw">let </span>zero_index = Reg64::rax; <span class="kw">use </span>reg::Reg; <span class="macro">assert_eq!</span>(zero_index.idx(), <span class="number">0</span>); <span class="kw">match </span><span class="self">self </span>{ MemOp::Indirect(..) => zero_index, MemOp::IndirectDisp(..) => zero_index, MemOp::IndirectBaseIndex(.., index) => <span class="kw-2">*</span>index, } } } <span class="doccomment">/// Trait to give size hints for memory operands. </span><span class="kw">trait </span>MemOpSized { <span class="kw">fn </span>mem_op(<span class="kw-2">&</span><span class="self">self</span>) -> MemOp; } <span class="macro">macro_rules!</span> impl_memop_sized { ($(<span class="attr">#[<span class="macro-nonterminal">$doc</span>:meta] </span><span class="macro-nonterminal">$name</span>:ident)+) => { $( <span class="attr">#[<span class="macro-nonterminal">$doc</span>] </span><span class="kw">pub struct </span><span class="macro-nonterminal">$name</span>(MemOp); <span class="kw">impl </span><span class="macro-nonterminal">$name </span>{ <span class="doccomment">/// Create a memory with size hint from a raw memory operand. </span><span class="kw">pub fn </span>from(op: MemOp) -> <span class="self">Self </span>{ <span class="self">Self</span>(op) } } <span class="kw">impl </span>MemOpSized <span class="kw">for </span><span class="macro-nonterminal">$name </span>{ <span class="kw">fn </span>mem_op(<span class="kw-2">&</span><span class="self">self</span>) -> MemOp { <span class="self">self</span>.<span class="number">0 </span>} } )+ }; } <span class="macro">impl_memop_sized!</span>( <span class="doccomment">/// A memory operand with a word (8 bit) size hint. </span>MemOp8 <span class="doccomment">/// A memory operand with a word (16 bit) size hint. </span>MemOp16 <span class="doccomment">/// A memory operand with a dword (32 bit) size hint. </span>MemOp32 <span class="doccomment">/// A memory operand with a qword (64 bit) size hint. </span>MemOp64 ); </code></pre></div></section></main></body></html>