From 2e4a31287705d8437cddd109c12b7e11825192bc Mon Sep 17 00:00:00 2001 From: johannst Date: Wed, 9 Jun 2021 23:05:05 +0200 Subject: added riscv64 --- lib/arch/riscv64/README.md | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 lib/arch/riscv64/README.md (limited to 'lib/arch/riscv64/README.md') diff --git a/lib/arch/riscv64/README.md b/lib/arch/riscv64/README.md new file mode 100644 index 0000000..517ddb2 --- /dev/null +++ b/lib/arch/riscv64/README.md @@ -0,0 +1,12 @@ +# riscv64 (RISC-V ELF) +Provide an implementation of the platform specific API as required in +[`api.h`](../api.h) according to the `RISC-V ELF ABI`. + +## Notes: RISC-V ABI +- Integer/pointer arguments via `x10 - x17` +- Integer/pointer return values via `x10` - `x11` +- Callee saved registers `x2`, `x8` - `x9`, `x18` - `x27`, `f8` - `f9`, `f18` - `f27` + +## References +- [RISC-V ABI](https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md) +- [RISC-V asm manual](https://github.com/riscv/riscv-asm-manual/blob/master/riscv-asm.md) -- cgit v1.2.3