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| author | johannst <johannst@users.noreply.github.com> | 2021-06-02 22:38:57 +0000 |
|---|---|---|
| committer | johannst <johannst@users.noreply.github.com> | 2021-06-02 22:38:57 +0000 |
| commit | d2d2ba7c6602e73dc2e3dbd0aa4215e4c412a688 (patch) | |
| tree | 360d361f769b79d9af2c02758eaa05fb887bf679 /src/kvm_rs/x86_64.rs.html | |
| download | mini-kvm-rs-d2d2ba7c6602e73dc2e3dbd0aa4215e4c412a688.tar.gz mini-kvm-rs-d2d2ba7c6602e73dc2e3dbd0aa4215e4c412a688.zip | |
deploy: d2e2063cb2b5a82709e9c5188602a9fc0f7dadbd
Diffstat (limited to 'src/kvm_rs/x86_64.rs.html')
| -rw-r--r-- | src/kvm_rs/x86_64.rs.html | 315 |
1 files changed, 315 insertions, 0 deletions
diff --git a/src/kvm_rs/x86_64.rs.html b/src/kvm_rs/x86_64.rs.html new file mode 100644 index 0000000..5671eba --- /dev/null +++ b/src/kvm_rs/x86_64.rs.html @@ -0,0 +1,315 @@ +<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="Source of the Rust file `src/x86_64.rs`."><meta name="keywords" content="rust, rustlang, rust-lang"><title>x86_64.rs - source</title><link rel="stylesheet" type="text/css" href="../../normalize.css"><link rel="stylesheet" type="text/css" href="../../rustdoc.css" id="mainThemeStyle"><link rel="stylesheet" type="text/css" href="../../light.css" id="themeStyle"><link rel="stylesheet" type="text/css" href="../../dark.css" disabled ><link rel="stylesheet" type="text/css" href="../../ayu.css" disabled ><script id="default-settings"></script><script src="../../storage.js"></script><script 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role="menu"></div></div><script src="../../theme.js"></script><nav class="sub"><form class="search-form"><div class="search-container"><div><select id="crate-search"><option value="All crates">All crates</option></select><input class="search-input" name="search" disabled autocomplete="off" spellcheck="false" placeholder="Click or press ‘S’ to search, ‘?’ for more options…" type="search"></div><button type="button" class="help-button">?</button> + <a id="settings-menu" href="../../settings.html"><img src="../../wheel.svg" width="18" height="18" alt="Change settings"></a></div></form></nav><section id="main" class="content"><pre class="line-numbers"><span id="1"> 1</span> +<span id="2"> 2</span> +<span id="3"> 3</span> +<span id="4"> 4</span> +<span id="5"> 5</span> +<span id="6"> 6</span> +<span id="7"> 7</span> +<span id="8"> 8</span> +<span id="9"> 9</span> +<span id="10"> 10</span> +<span id="11"> 11</span> +<span id="12"> 12</span> +<span id="13"> 13</span> +<span id="14"> 14</span> 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+<span id="129">129</span> +<span id="130">130</span> +<span id="131">131</span> +<span id="132">132</span> +<span id="133">133</span> +<span id="134">134</span> +<span id="135">135</span> +<span id="136">136</span> +<span id="137">137</span> +<span id="138">138</span> +<span id="139">139</span> +<span id="140">140</span> +<span id="141">141</span> +<span id="142">142</span> +<span id="143">143</span> +<span id="144">144</span> +<span id="145">145</span> +<span id="146">146</span> +<span id="147">147</span> +<span id="148">148</span> +<span id="149">149</span> +<span id="150">150</span> +<span id="151">151</span> +<span id="152">152</span> +<span id="153">153</span> +<span id="154">154</span> +</pre><div class="example-wrap"><pre class="rust "> +<span class="doccomment">//! `x86_64` flags and bitfields.</span> + +<span class="comment">/* Rflags Register */</span> + +<span class="doccomment">/// Carry flag.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">RFLAGS_CF</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">0</span>; +<span class="doccomment">/// Parity flag.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">RFLAGS_PF</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">2</span>; +<span class="doccomment">/// Adjust flag.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">RFLAGS_AF</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">4</span>; +<span class="doccomment">/// Zero flag.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">RFLAGS_ZF</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">6</span>; +<span class="doccomment">/// Sign flag.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">RFLAGS_SF</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">7</span>; +<span class="doccomment">/// Sign flag.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">RFLAGS_IF</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">9</span>; +<span class="doccomment">/// Direction flag.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">RFLAGS_DF</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">10</span>; +<span class="doccomment">/// Overflow flag.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">RFLAGS_OF</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">11</span>; +<span class="doccomment">/// I/O privilege level.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">RFLAGS_IOPL</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">0b11</span> <span class="op"><</span><span class="op"><</span> <span class="number">12</span>; +<span class="doccomment">/// Alignment check.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">RFLAGS_AC</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">18</span>; + +<span class="kw">pub</span> <span class="kw">const</span> <span class="kw">fn</span> <span class="ident">rflags_cf</span>(<span class="ident">r</span>: <span class="ident">u64</span>) <span class="op">-</span><span class="op">></span> <span class="ident">u64</span> { (<span class="ident">r</span> <span class="op">&</span> <span class="ident">RFLAGS_CF</span>) <span class="op">></span><span class="op">></span> <span class="number">0</span> } +<span class="kw">pub</span> <span class="kw">const</span> <span class="kw">fn</span> <span class="ident">rflags_pf</span>(<span class="ident">r</span>: <span class="ident">u64</span>) <span class="op">-</span><span class="op">></span> <span class="ident">u64</span> { (<span class="ident">r</span> <span class="op">&</span> <span class="ident">RFLAGS_PF</span>) <span class="op">></span><span class="op">></span> <span class="number">2</span> } +<span class="kw">pub</span> <span class="kw">const</span> <span class="kw">fn</span> <span class="ident">rflags_af</span>(<span class="ident">r</span>: <span class="ident">u64</span>) <span class="op">-</span><span class="op">></span> <span class="ident">u64</span> { (<span class="ident">r</span> <span class="op">&</span> <span class="ident">RFLAGS_AF</span>) <span class="op">></span><span class="op">></span> <span class="number">4</span> } +<span class="kw">pub</span> <span class="kw">const</span> <span class="kw">fn</span> <span class="ident">rflags_zf</span>(<span class="ident">r</span>: <span class="ident">u64</span>) <span class="op">-</span><span class="op">></span> <span class="ident">u64</span> { (<span class="ident">r</span> <span class="op">&</span> <span class="ident">RFLAGS_ZF</span>) <span class="op">></span><span class="op">></span> <span class="number">6</span> } +<span class="kw">pub</span> <span class="kw">const</span> <span class="kw">fn</span> <span class="ident">rflags_sf</span>(<span class="ident">r</span>: <span class="ident">u64</span>) <span class="op">-</span><span class="op">></span> <span class="ident">u64</span> { (<span class="ident">r</span> <span class="op">&</span> <span class="ident">RFLAGS_SF</span>) <span class="op">></span><span class="op">></span> <span class="number">7</span> } +<span class="kw">pub</span> <span class="kw">const</span> <span class="kw">fn</span> <span class="ident">rflags_if</span>(<span class="ident">r</span>: <span class="ident">u64</span>) <span class="op">-</span><span class="op">></span> <span class="ident">u64</span> { (<span class="ident">r</span> <span class="op">&</span> <span class="ident">RFLAGS_IF</span>) <span class="op">></span><span class="op">></span> <span class="number">9</span> } +<span class="kw">pub</span> <span class="kw">const</span> <span class="kw">fn</span> <span class="ident">rflags_df</span>(<span class="ident">r</span>: <span class="ident">u64</span>) <span class="op">-</span><span class="op">></span> <span class="ident">u64</span> { (<span class="ident">r</span> <span class="op">&</span> <span class="ident">RFLAGS_DF</span>) <span class="op">></span><span class="op">></span> <span class="number">10</span> } +<span class="kw">pub</span> <span class="kw">const</span> <span class="kw">fn</span> <span class="ident">rflags_of</span>(<span class="ident">r</span>: <span class="ident">u64</span>) <span class="op">-</span><span class="op">></span> <span class="ident">u64</span> { (<span class="ident">r</span> <span class="op">&</span> <span class="ident">RFLAGS_OF</span>) <span class="op">></span><span class="op">></span> <span class="number">11</span> } +<span class="kw">pub</span> <span class="kw">const</span> <span class="kw">fn</span> <span class="ident">rflags_iopl</span>(<span class="ident">r</span>: <span class="ident">u64</span>) <span class="op">-</span><span class="op">></span> <span class="ident">u64</span> { (<span class="ident">r</span> <span class="op">&</span> <span class="ident">RFLAGS_IOPL</span>) <span class="op">></span><span class="op">></span> <span class="number">12</span> } +<span class="kw">pub</span> <span class="kw">const</span> <span class="kw">fn</span> <span class="ident">rflags_ac</span>(<span class="ident">r</span>: <span class="ident">u64</span>) <span class="op">-</span><span class="op">></span> <span class="ident">u64</span> { (<span class="ident">r</span> <span class="op">&</span> <span class="ident">RFLAGS_AC</span>) <span class="op">></span><span class="op">></span> <span class="number">18</span> } + +<span class="comment">/* Segment Selector */</span> + +<span class="doccomment">/// Requested privilege level.</span> +<span class="doccomment">///</span> +<span class="doccomment">/// Privilege level of the segment selector, where `0` is the most privileged mode and `3` the</span> +<span class="doccomment">/// least.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">SEG_SELECTOR_RPL</span> : <span class="ident">u16</span> <span class="op">=</span> <span class="number">0b11</span> <span class="op"><</span><span class="op"><</span> <span class="number">0</span>; +<span class="doccomment">/// Table indicator.</span> +<span class="doccomment">///</span> +<span class="doccomment">/// | TI | Table |</span> +<span class="doccomment">/// |----|-------|</span> +<span class="doccomment">/// | 0 | GDT |</span> +<span class="doccomment">/// | 1 | LDT |</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">SEG_SELECTOR_TI</span> : <span class="ident">u16</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">2</span>; +<span class="doccomment">/// Table index.</span> +<span class="doccomment">///</span> +<span class="doccomment">/// Index into the `GDT` or `LDT` table to select the segment descriptor. `GDT.base + 8 * index`</span> +<span class="doccomment">/// gives the address of the segment descriptor (times `8` because every segment descriptor is `8</span> +<span class="doccomment">/// byte`).</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">SEG_SELECTOR_INDEX</span> : <span class="ident">u16</span> <span class="op">=</span> <span class="number">0x1fff</span> <span class="op"><</span><span class="op"><</span> <span class="number">3</span>; + +<span class="kw">pub</span> <span class="kw">const</span> <span class="kw">fn</span> <span class="ident">seg_selector_rpl</span>(<span class="ident">s</span> : <span class="ident">u16</span>) <span class="op">-</span><span class="op">></span> <span class="ident">u16</span> { (<span class="ident">s</span> <span class="op">&</span> <span class="ident">SEG_SELECTOR_RPL</span>) <span class="op">></span><span class="op">></span> <span class="number">0</span> } +<span class="kw">pub</span> <span class="kw">const</span> <span class="kw">fn</span> <span class="ident">seg_selector_ti</span>(<span class="ident">s</span> : <span class="ident">u16</span>) <span class="op">-</span><span class="op">></span> <span class="ident">u16</span> { (<span class="ident">s</span> <span class="op">&</span> <span class="ident">SEG_SELECTOR_TI</span>) <span class="op">></span><span class="op">></span> <span class="number">2</span> } +<span class="kw">pub</span> <span class="kw">const</span> <span class="kw">fn</span> <span class="ident">seg_selector_index</span>(<span class="ident">s</span> : <span class="ident">u16</span>) <span class="op">-</span><span class="op">></span> <span class="ident">u16</span> { (<span class="ident">s</span> <span class="op">&</span> <span class="ident">SEG_SELECTOR_INDEX</span>) <span class="op">></span><span class="op">></span> <span class="number">3</span> } + +<span class="comment">/* Control Register CR0 (operation mode & state of the processor) */</span> + +<span class="doccomment">/// Protection Enable.</span> +<span class="doccomment">///</span> +<span class="doccomment">/// Enables `protected mode` when set and `real-address mode` when cleared. This enables</span> +<span class="doccomment">/// `segment-level protection` not paging.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR0_PE</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">0</span>; +<span class="doccomment">/// Monitor Coprocessor.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR0_MP</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">1</span>; +<span class="doccomment">/// Emulation.</span> +<span class="doccomment">///</span> +<span class="doccomment">/// When set indicates the process does not have a FPU. FPU instructions will generate an exception</span> +<span class="doccomment">/// that software can emulate the instruction.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR0_EM</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">2</span>; +<span class="doccomment">/// Task Switched.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR0_TS</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">3</span>; +<span class="doccomment">/// Extension Type.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR0_ET</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">4</span>; +<span class="doccomment">/// Numeric Error.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR0_NE</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">5</span>; +<span class="doccomment">/// Write Protect.</span> +<span class="doccomment">///</span> +<span class="doccomment">/// When set supervisor-level procedures can't write to read-only pages.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR0_WP</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">16</span>; +<span class="doccomment">/// Alignment Mask.</span> +<span class="doccomment">///</span> +<span class="doccomment">/// Enables alignment check for `CPL=3`, check is only done if the [AC</span> +<span class="doccomment">/// bit](crate::x86_64::RFLAGS_AC) of the `rflags` register ist set.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR0_AM</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">18</span>; +<span class="doccomment">/// Not Write-Torugh.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR0_NW</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">29</span>; +<span class="doccomment">/// Cachine disable.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR0_CD</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">30</span>; +<span class="doccomment">/// Paging.</span> +<span class="doccomment">///</span> +<span class="doccomment">/// Enables paging when set, requires [CR0_PE](crate::x86_64::CR0_PE) to be set as well.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR0_PG</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">31</span>; + +<span class="comment">/* Control Register CR3 (paging information) + * + * Holds the physical base address of the first paging structure. The 12 lower bytes of the base + * address are assumed to be 0 and hence the first paging structure must be aligned to a 4K + * boundary. + */</span> + +<span class="doccomment">/// Mask for physical base address of paging structure.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR3_PAGE_BASE_MASK</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">0xffff_ffff_ffff_0000</span>; + +<span class="doccomment">/// Page-level Write-Through.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR3_PWT</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">3</span>; +<span class="doccomment">/// Page-level Cache Disable.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR3_PCD</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">4</span>; + +<span class="comment">/* Control Register CR4 (flags for arch extenstions processor capabilities) */</span> + +<span class="doccomment">/// Physical Address Extenstion.</span> +<span class="doccomment">///</span> +<span class="doccomment">/// When set enables paging to produce physicall addresses with more than 32 bits. Required before</span> +<span class="doccomment">/// entering `long mode`.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR4_PAE</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">5</span>; +<span class="doccomment">/// 57-bit Linear Addresses.</span> +<span class="doccomment">///</span> +<span class="doccomment">/// When set in `long mode` enables `5-level` paging to translate `57-bit` linear addresses. When</span> +<span class="doccomment">/// cleared use `4-level` paging to translate `48-bit` linear addresses.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">CR4_LA57</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">5</span>; + +<span class="comment">/* Extended Feature Enable Register (EFER) */</span> + +<span class="doccomment">/// Extended Feature Enable Register MSR number.</span> +<span class="doccomment">///</span> +<span class="doccomment">/// MSR number used with the [`rdmsr`][msr] and [`wrmsr`][msr] instructions to read/write the</span> +<span class="doccomment">/// `EFER` model specific register.</span> +<span class="doccomment">///</span> +<span class="doccomment">/// [msr]: https://johannst.github.io/notes/arch/x86_64.html#model-specific-register-msr</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">MSR_EFER</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">0xc000_0080</span>; + +<span class="doccomment">/// Long Mode Enable.</span> +<span class="doccomment">///</span> +<span class="doccomment">/// When set enables long mode operations.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">EFER_LME</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">8</span>; +<span class="doccomment">/// Long Mode Active (readonly).</span> +<span class="doccomment">///</span> +<span class="doccomment">/// When set indicates long mode is active.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">EFER_LMA</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">10</span>; + +<span class="comment">/* Paging */</span> + +<span class="doccomment">/// Page entry present.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">PAGE_ENTRY_PRESENT</span> : <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">0</span>; +<span class="doccomment">/// Page region read/write.</span> +<span class="doccomment">///</span> +<span class="doccomment">/// If set, region reference by paging entry is writeable.</span> +<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">PAGE_RENTRY_RW</span> : <span class="ident">u64</span> <span class="op">=</span> <span class="number">1</span> <span class="op"><</span><span class="op"><</span> <span class="number">1</span>; +</pre></div> +</section><section id="search" class="content hidden"></section><section class="footer"></section><div id="rustdoc-vars" data-root-path="../../" data-current-crate="kvm_rs" data-search-js="../../search-index.js"></div> + <script src="../../main.js"></script><script src="../../source-script.js"></script><script src="../../source-files.js"></script></body></html>
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