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.","Load the bytes stored in data
into memory at physical …","Allocate a zero-initialized memory region of len
bytes.","","","","","","","VCPU system ioctls.","VM system ioctls.","Allocate a zero-initialized memory region of len
bytes …","x86_64
flags and bitfields.","Definition of capabilities that return a bool value …","Definition of capabilities that return an integer value …","Check if capabilities can be queried on VM fds (…","Get the possible max VPCUs (KVM_CAP_MAX_VCPUS
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ioctls.","","","Check availability of an extension with the …","Check availability of an extension with the …","Create a new virtual machine with the KVM_CREATE_VM
ioctl.…","","","Open the /dev/kvm
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…","Get the special registers with the KVM_GET_SREGS
ioctl in …","","","Run the guest VCPU with the KVM_RUN
ioctl until it exits …","Set the general purpose registers with the KVM_SET_REGS
…","Set the special registers with the KVM_SET_SREGS
ioctl in …","","","","","","","Wrapper for VM ioctls.","","","Create a new virtual cpu with the KVM_CREATE_VCPU
ioctl. …","","","Map memory from userspace into the VM as guest physical
…","","","","Alignment Mask.","Cachine disable.","Emulation.","Extension Type.","Monitor Coprocessor.","Numeric Error.","Not Write-Torugh.","Protection Enable.","Paging.","Task Switched.","Write Protect.","Mask for physical base address of paging structure.","Page-level Cache Disable.","Page-level Write-Through.","57-bit Linear Addresses.","Physical Address Extenstion.","Long Mode Active (readonly).","Long Mode Enable.","Extended Feature Enable Register MSR number.","Page entry present.","Page region read/write.","Alignment check.","Adjust flag.","Carry flag.","Direction flag.","Sign flag.","I/O privilege level.","Overflow flag.","Parity flag.","Sign flag.","Zero flag.","Table index.","Requested privilege level.","Table indicator.","","","","","","","","","","","","",""],"i":[1,0,0,2,2,1,2,1,2,0,2,1,2,1,2,0,0,2,2,1,2,1,2,1,2,0,0,2,0,0,0,3,4,4,3,4,3,4,3,4,3,3,4,4,3,4,3,4,3,4,0,5,5,5,5,5,5,5,5,5,5,5,6,7,7,8,9,7,8,6,9,7,8,6,6,6,6,6,6,6,7,9,7,8,6,7,6,6,6,9,9,7,7,8,8,6,6,9,7,8,6,6,7,6,6,6,6,9,7,8,6,0,0,0,0,7,6,7,8,7,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,7,7,6,9,7,8,6,6,9,7,8,6,9,7,8,6,7,9,7,8,6,10,10,10,0,10,10,0,10,11,10,11,10,11,11,11,10,11,11,11,11,10,11,10,11,10,11,0,12,12,12,12,12,12,12,12,12,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],"f":[null,null,null,[[]],[[]],[[]],[[]],[[]],[[]],null,[[]],[[]],[[]],[[]],[[]],null,null,[[["physaddr",3]]],[[["usize",15]],[["result",6],["usermem",3]]],[[],["result",4]],[[],["result",4]],[[],["result",4]],[[],["result",4]],[[],["typeid",3]],[[],["typeid",3]],null,null,[[["usize",15]],[["result",6],["usermem",3]]],null,null,null,null,null,null,[[]],[[]],[[]],[[]],[[]],[[]],[[],["u64",15]],[[]],[[]],[[],["u64",15]],[[],["result",4]],[[],["result",4]],[[],["result",4]],[[],["result",4]],[[],["typeid",3]],[[],["typeid",3]],null,[[]],[[]],[[["capbool",4]],["bool",15]],[[["capint",4]],["i32",15]],[[],[["result",6],["vm",3]]],[[]],[[]],[[],[["result",6],["kvm",3]]],[[],["result",4]],[[],["result",4]],[[],["typeid",3]],null,null,null,null,[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],null,null,null,null,null,null,null,[[],["kvm_regs",3]],[[],["kvm_segment",3]],[[],["kvm_dtable",3]],[[],["kvm_sregs",3]],null,null,null,null,[[["formatter",3]],["result",6]],[[["formatter",3]],["result",6]],[[["formatter",3]],["result",6]],[[["formatter",3]],["result",6]],[[["formatter",3]],["result",6]],[[["formatter",3]],["result",6]],[[["formatter",3]],["result",6]],[[["formatter",3]],["result",6]],[[]],[[]],[[]],[[]],null,null,null,null,null,null,[[]],[[]],[[]],[[]],null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,[[],["string",3]],[[],["string",3]],[[],["string",3]],[[],["string",3]],null,[[],["result",4]],[[],["result",4]],[[],["result",4]],[[],["result",4]],[[],["result",4]],[[],["result",4]],[[],["result",4]],[[],["result",4]],null,[[],["typeid",3]],[[],["typeid",3]],[[],["typeid",3]],[[],["typeid",3]],null,null,null,null,null,null,null,[[]],[[]],[[]],[[]],[[]],[[]],[[],[["result",6],["kvm_regs",3]]],[[],[["result",6],["kvm_sregs",3]]],[[]],[[]],[[],[["result",6],["kvmexit",4]]],[[["kvm_regs",3]],["result",6]],[[["kvm_sregs",3]],["result",6]],[[],["result",4]],[[],["result",4]],[[],["result",4]],[[],["result",4]],[[],["typeid",3]],[[],["typeid",3]],null,[[]],[[]],[[["u64",15]],[["vcpu",3],["result",6]]],[[]],[[]],[[["physaddr",3],["usermem",3]],["result",6]],[[],["result",4]],[[],["result",4]],[[],["typeid",3]],null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,[[["u64",15]],["u64",15]],[[["u64",15]],["u64",15]],[[["u64",15]],["u64",15]],[[["u64",15]],["u64",15]],[[["u64",15]],["u64",15]],[[["u64",15]],["u64",15]],[[["u64",15]],["u64",15]],[[["u64",15]],["u64",15]],[[["u64",15]],["u64",15]],[[["u64",15]],["u64",15]],[[["u16",15]],["u16",15]],[[["u16",15]],["u16",15]],[[["u16",15]],["u16",15]]],"p":[[3,"PhysAddr"],[3,"UserMem"],[4,"CapBool"],[4,"CapInt"],[3,"Kvm"],[3,"kvm_sregs"],[3,"kvm_segment"],[3,"kvm_dtable"],[3,"kvm_regs"],[4,"KvmExit"],[3,"Vcpu"],[3,"Vm"]]}\
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