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                        <h1 id="arm64"><a class="header" href="#arm64">arm64</a></h1>
<p>keywords: arm64, aarch64, abi</p>
<ul>
<li>64bit synonyms: <code>arm64</code>, <code>aarch64</code></li>
<li>ISA type: <code>RISC</code></li>
<li>Endianness: <code>little</code>, <code>big</code></li>
</ul>
<h2 id="registers"><a class="header" href="#registers">Registers</a></h2>
<h3 id="general-purpose-registers"><a class="header" href="#general-purpose-registers">General purpose registers</a></h3>
<pre><code class="language-markdown">bytes
[7:0]     [3:0]     desc
---------------------------------------------
x0-x28    w0-w28    general purpose registers
x29       w29       frame pointer (FP)
x30       w30       link register (LR)
sp        wsp       stack pointer (SP)
pc                  program counter (PC)
xzr       wzr       zero register
</code></pre>
<blockquote>
<p>Write to <code>wN</code> register clears upper 32bit.</p>
</blockquote>
<h3 id="special-registers-per-el"><a class="header" href="#special-registers-per-el">Special registers per EL</a></h3>
<pre><code class="language-markdown">bytes
[7:0]       desc
---------------------------------------------
sp_el0      stack pointer EL0

sp_el1      stack pointer EL1
elr_el1     exception link register EL1
spsr_el1    saved process status register EL1

sp_el2      stack pointer EL2
elr_el2     exception link register EL2
spsr_el2    saved process status register EL2

sp_el3      stack pointer EL3
elr_el3     exception link register EL3
spsr_el3    saved process status register EL3
</code></pre>
<h2 id="instructions-cheatsheet"><a class="header" href="#instructions-cheatsheet">Instructions cheatsheet</a></h2>
<h3 id="accessing-system-registers"><a class="header" href="#accessing-system-registers">Accessing system registers</a></h3>
<p>Reading from system registers:</p>
<pre><code class="language-armasm">mrs x0, vbar_el1      // move vbar_el1 into x0
</code></pre>
<p>Writing to system registers:</p>
<pre><code class="language-armasm">msr vbar_el1, x0      // move x0 into vbar_el1
</code></pre>
<h3 id="control-flow"><a class="header" href="#control-flow">Control Flow</a></h3>
<pre><code class="language-armasm">b &lt;offset&gt;    // relative forward/back branch
br &lt;Xn&gt;       // absolute branch to address in register Xn

// branch &amp; link, store return address in X30 (LR)
bl &lt;offset&gt;   // relative forward/back branch
blr &lt;Xn&gt;      // absolute branch to address in register Xn

ret {Xn}      // return to address in X30, or Xn if supplied
</code></pre>
<h2 id="addressing"><a class="header" href="#addressing">Addressing</a></h2>
<h3 id="offset"><a class="header" href="#offset">Offset</a></h3>
<pre><code class="language-armasm">ldr x0, [x1]                // x0 = [x1]
ldr x0, [x1, 8]             // x0 = [x1 + 8]
ldr x0, [x1, x2, lsl #3]    // x0 = [x1 + (x2&lt;&lt;3)]
ldr x0, [x1, w2, stxw]      // x0 = [x1 + sign_ext(w2)]
ldr x0, [x1, w2, stxw #3]   // x0 = [x1 + (sign_ext(w2)&lt;&lt;3)]
</code></pre>
<blockquote>
<p>Shift amount can either be <code>0</code> or <code>log2(access_size_bytes)</code>. Eg for 8byte
access it can either be <code>{0, 3}</code>.</p>
</blockquote>
<h3 id="index"><a class="header" href="#index">Index</a></h3>
<pre><code class="language-armasm">ldr x0, [x1, 8]!    // pre-inc : x1+=8; x0 = [x1]
ldr x0, [x1], 8     // post-inc: x0 = [x1]; x1+=8
</code></pre>
<h3 id="pair-access"><a class="header" href="#pair-access">Pair access</a></h3>
<pre><code class="language-armasm">ldp x1, x2, [x0]    // x1 = [x0]; x2 = [x0 + 8]
stp x1, x2, [x0]    // [x0] = x1; [x0 + 8] = x2
</code></pre>
<h2 id="procedure-call-standard-arm64-aapcs64"><a class="header" href="#procedure-call-standard-arm64-aapcs64">Procedure Call Standard ARM64 (<a href="https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst"><code>aapcs64</code></a>)</a></h2>
<h3 id="passing-arguments-to-functions"><a class="header" href="#passing-arguments-to-functions">Passing arguments to functions</a></h3>
<ul>
<li>Integer/Pointer arguments
<pre><code class="language-markdown">reg     arg
-----------
x0        1
..       ..
x7        8
</code></pre>
</li>
<li>Additional arguments are passed on the stack. Arguments are pushed
<code>right-to-left (RTL)</code>, meaning next arguments are closer to current <code>sp</code>.
<pre><code class="language-markdown">void take(..., int a9, int a10);
                   |       |   | ... |       Hi
                   |       +--&gt;| a10 |       |
                   +----------&gt;| a9  | &lt;-SP  |
                               +-----+       v
                               | ... |       Lo
</code></pre>
</li>
</ul>
<h3 id="return-values-from-functions"><a class="header" href="#return-values-from-functions">Return values from functions</a></h3>
<ul>
<li>Integer/Pointer return values
<pre><code class="language-markdown">reg          size
-----------------
x0         64 bit
</code></pre>
</li>
</ul>
<h3 id="callee-saved-registers"><a class="header" href="#callee-saved-registers">Callee saved registers</a></h3>
<ul>
<li><code>x19</code> - <code>x28</code></li>
<li><code>SP</code></li>
</ul>
<h3 id="stack"><a class="header" href="#stack">Stack</a></h3>
<ul>
<li>full descending
<ul>
<li>full: <code>sp</code> points to the last used location (valid item)</li>
<li>descending: stack grows downwards</li>
</ul>
</li>
<li><code>sp</code> must be 16byte aligned when used to access memory for r/w</li>
<li><code>sp</code> must be 16byte aligned on public interface interfaces</li>
</ul>
<h3 id="frame-chain"><a class="header" href="#frame-chain">Frame chain</a></h3>
<ul>
<li>linked list of stack-frames</li>
<li>each frame links to the frame of its caller by a <code>frame record</code>
<ul>
<li>a frame record is described as a <code>(FP,LR)</code> pair</li>
</ul>
</li>
<li><code>x29 (FP)</code> must point to the frame record of the current stack-frame
<pre><code class="language-markdown">      +------+                   Hi
      |   0  |     frame0        |
   +-&gt;|   0  |                   |
   |  |  ... |                   |
   |  +------+                   |
   |  |  LR  |     frame1        |
   +--|  FP  |&lt;-+                |
      | ...  |  |                |
      +------+  |                |
      |  LR  |  |  current       |
x29 -&gt;|  FP  |--+  frame         v
      | ...  |                   Lo
</code></pre>
</li>
<li>end of the frame chain is indicated by following frame record <code>(0,-)</code></li>
<li>location of the frame record in the stack frame is not specified</li>
</ul>
<h3 id="function-prologue--epilogue"><a class="header" href="#function-prologue--epilogue">Function prologue &amp; epilogue</a></h3>
<ul>
<li>prologue
<pre><code class="language-armasm">sub sp, sp, 16
stp x29, x30, [sp]      // [sp] = x29; [sp + 8] = x30
mov x29, sp             // FP points to frame record
</code></pre>
</li>
<li>epilogue
<pre><code class="language-armasm">ldp x29, x30, [sp]      // x29 = [sp]; x30 = [sp + 8]
add sp, sp, 16
ret
</code></pre>
</li>
</ul>
<h2 id="asm-skeleton"><a class="header" href="#asm-skeleton">ASM skeleton</a></h2>
<p>Small assembler skeleton, ready to use with following properties:</p>
<ul>
<li>use raw Linux syscalls (<code>man 2 syscall</code> for ABI)</li>
<li>no <code>C runtime (crt)</code></li>
<li>gnu assembler <a href="https://sourceware.org/binutils/docs/as"><code>gas</code></a></li>
</ul>
<pre><code class="language-armasm">// file: greet.S

#include &lt;asm/unistd.h&gt;      // syscall NRs

    .arch armv8-a

    .section .text, &quot;ax&quot;, @progbits
    .balign 4                // align code on 4byte boundary
    .global _start
_start:
    mov x0, 2                // fd
    ldr x1, =greeting        // buf
    ldr x2, =greeting_len    // &amp;len
    ldr x2, [x2]             // len
    mov w8, __NR_write       // write(2) syscall
    svc 0

    mov x0, 0                // exit code
    mov w8, __NR_exit        // exit(2) syscall
    svc 0

    .balign 8                // align data on 8byte boundary
    .section .rodata, &quot;a&quot;, @progbits
greeting:
    .asciz &quot;Hi ASM-World!\n&quot;
greeting_len:
    .int .-greeting
</code></pre>
<blockquote>
<p>man gcc: <code>file.S</code> assembler code that must be preprocessed.</p>
</blockquote>
<p>To cross-compile and run:</p>
<pre><code class="language-bash">&gt; aarch64-linux-gnu-g++ -o greet greet.S -nostartfiles -nostdlib          \
    -Wl,--dynamic-linker=/usr/aarch64-linux-gnu/lib/ld-linux-aarch64.so.1 \
  &amp;&amp; qemu-aarch64 ./greet
Hi ASM-World!
</code></pre>
<blockquote>
<p>Cross-compiling on <code>Ubuntu 20.04 (x86_64)</code>, paths might differ on other
distributions. Explicitly specifying the dynamic linker should not be
required when compiling natively on arm64.</p>
</blockquote>
<h2 id="references"><a class="header" href="#references">References</a></h2>
<ul>
<li><a href="https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst">Procedure Call Standard ARM64</a></li>
<li><a href="https://developer.arm.com/documentation/den0024/latest">ARMv8-A Programmer's Guide</a></li>
<li><a href="https://developer.arm.com/documentation/ddi0487/latest">ARMv8-A Architecture Reference Manual</a></li>
<li><a href="https://developer.arm.com/documentation/dai0527/latest">AppNote: ARMv8 Bare-metal boot code</a></li>
<li><a href="https://sourceware.org/binutils/docs/as">GNU Assembler</a></li>
<li><a href="https://sourceware.org/binutils/docs/as/Pseudo-Ops.html#Pseudo-Ops">GNU Assembler Directives</a></li>
<li><a href="https://sourceware.org/binutils/docs/as/AArch64_002dDependent.html">GNU Assembler <code>AArch64</code> dependent features</a></li>
</ul>

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