deploy: cb9e06f3a5bd9d42494e6abdaf61fb3fe19d4ea4

4 files changed, 132 insertions, 0 deletions

diff --git a/arch/x86/cpuid/Makefile b/arch/x86/cpuid/Makefile
new file mode 100644
index 0000000..577d96a
--- /dev/null
+++ b/arch/x86/cpuid/Makefile
@@ -0,0 +1,5 @@
+a.out: cpuid.c
+	gcc -g cpuid.c
+
+clean:
+	$(RM) a.out
diff --git a/arch/x86/cpuid/cpuid.c b/arch/x86/cpuid/cpuid.c
new file mode 100644
index 0000000..ab4a7a4
--- /dev/null
+++ b/arch/x86/cpuid/cpuid.c
@@ -0,0 +1,47 @@
+#include <stdint.h>
+#include <stdio.h>
+
+typedef struct {
+  uint32_t eax, ebx, ecx, edx;
+} cpuid_t;
+
+// in: eax is the cpuid leaf number
+static inline cpuid_t cpuid(uint32_t eax) {
+  cpuid_t r;
+  asm volatile("cpuid"
+               : "=a"(r.eax), "=b"(r.ebx), "=c"(r.ecx), "=d"(r.edx)
+               : "a"(eax), "c"(0));
+  return r;
+};
+
+// in: eax is the cpuid leaf number
+// in: ecx is the cpuid sub-leaf number
+static inline cpuid_t cpuid_subleaf(uint32_t eax, uint32_t ecx) {
+  cpuid_t r;
+  asm volatile("cpuid"
+               : "=a"(r.eax), "=b"(r.ebx), "=c"(r.ecx), "=d"(r.edx)
+               : "a"(eax), "c"(ecx));
+  return r;
+};
+
+int main() {
+  cpuid_t r;
+  uint32_t leafs = 1;
+
+  for (uint32_t l = 0; l < leafs; ++l) {
+    r = cpuid(l);
+    if (l == 0) {
+      // leaf 0 returns the highest available cpuid leaf in eax.
+      leafs = r.eax;
+
+      // ebx, edx, ecx contain the vendor string
+      // clang-format off
+      printf("vendor: %c%c%c%c%c%c%c%c%c%c%c%c\n",
+             (r.ebx & 0xFF), (r.ebx >> 8) & 0xFF, (r.ebx >> 16) & 0xFF, (r.ebx >> 24) & 0xFF,
+             (r.edx & 0xFF), (r.edx >> 8) & 0xFF, (r.edx >> 16) & 0xFF, (r.edx >> 24) & 0xFF,
+             (r.ecx & 0xFF), (r.ecx >> 8) & 0xFF, (r.ecx >> 16) & 0xFF, (r.ecx >> 24) & 0xFF);
+      // clang-format on
+    }
+    printf("[0x%08x] eax=%08x ebx=%08x ecx=%08x edx=%08x\n", l, r.eax, r.ebx, r.ecx, r.edx);
+  }
+}
diff --git a/arch/x86/seg/Makefile b/arch/x86/seg/Makefile
new file mode 100644
index 0000000..290025e
--- /dev/null
+++ b/arch/x86/seg/Makefile
@@ -0,0 +1,5 @@
+a.out: seg.c
+	gcc -g seg.c
+
+clean:
+	$(RM) a.out
diff --git a/arch/x86/seg/seg.c b/arch/x86/seg/seg.c
new file mode 100644
index 0000000..b06e0cb
--- /dev/null
+++ b/arch/x86/seg/seg.c
@@ -0,0 +1,75 @@
+#include <stdint.h>
+#include <stdio.h>
+
+// Reads GS segment base address (backed by IA32_GS_BASE msr).
+//
+// Instruction must be supported. Can be checked as
+//   cpuid(0x7).ebx & 1 == 1
+//
+// In case the instruction is not available, the base address can be
+// read with the following syscall.
+//   uint64_t addr;
+//   arch_prctl(ARCH_GET_GS, &addr)
+static inline uint64_t rdgsbase() {
+  uint64_t gs;
+  asm volatile("rdgsbase %0" : "=r"(gs));
+  return gs;
+}
+
+// Write GS segment base address (backed by IA32_GS_BASE msr).
+//
+// Instruction must be supported. Can be checked as
+//   cpuid(0x7).ebx & 1 == 1
+//
+// In case the instruction is not available, the base address can be
+// set with the following syscall.
+//   arch_prctl(ARCH_GET_GS, addr)
+static inline void wrgsbase(uint64_t* gs) {
+  asm volatile("wrgsbase %0" ::"r"(gs));
+}
+
+// Read u32 from off relative to GS segment.
+static inline uint32_t rdgs32(int64_t off) {
+  uint32_t ret;
+  asm volatile("mov %%gs:%1, %0" : "=r"(ret) : "m"(*(uint64_t*)off));
+  return ret;
+}
+
+// Read u64 from off relative to GS segment.
+static inline uint64_t rdgs64(int64_t off) {
+  uint64_t ret;
+  asm volatile("mov %%gs:%1, %0" : "=r"(ret) : "m"(*(uint64_t*)off));
+  return ret;
+}
+
+// Write u32 to off relative to GS segment.
+static inline void wrgs32(int64_t off, uint32_t val) {
+  asm volatile("mov %1, %%gs:%0" ::"m"(*(uint64_t*)off), "r"(val));
+}
+
+int main() {
+  printf("gsbase=%016lx\n", rdgsbase());
+
+  uint64_t VALS[] = {
+      0xa7a6a5a4a3a2a1a0,
+      0xb7b6b5b4b3b2b1b0,
+  };
+
+  // Setup GS segment base address.
+  wrgsbase(VALS);
+  printf("gsbase=%016lx | &VALS=%p\n", rdgsbase(), VALS);
+
+  // Read values relative to GS segment.
+  int64_t off[] = {0, 8, 4, 1};
+  for (int64_t i = 0; i < 4; ++i) {
+    printf("64: gs:%ld=%016lx\n", off[i], rdgs64(off[i]));
+    printf("32: gs:%ld=%016lx\n", off[i], rdgs32(off[i]));
+  }
+
+  // Write value relative to GS segment.
+  wrgs32(4, 0xddccbbaa);
+  printf("64: gs:%ld=%016lx\n", 0, rdgs64(0));
+
+  // Reset GS segment base address.
+  wrgsbase(0);
+}