From d45fbd7b57db7aaad55bdac0a28b47cec33d3c86 Mon Sep 17 00:00:00 2001
From: Johannes Stoelp <johannes.stoelp@gmail.com>
Date: Fri, 14 Mar 2025 01:07:06 +0100
Subject: x86: gs user-space example

---
 src/arch/x86_64.md | 9 +++++++++
 1 file changed, 9 insertions(+)

(limited to 'src/arch/x86_64.md')

diff --git a/src/arch/x86_64.md b/src/arch/x86_64.md
index 0ca18cc..575870f 100644
--- a/src/arch/x86_64.md
+++ b/src/arch/x86_64.md
@@ -422,6 +422,15 @@ itself.
  [15:0] Length of GDT table.
 ```
 
+> In 64-bit mode the `{cs, ds, es, ss}` segment register have no
+> effect, segmentation is effectively disabled. The `{gs, fs}` segment
+> register however can still be used for segmented memory access in
+> 64-bit with paging enabled. Segmentation takes place before VA -> PA
+> address translation.
+>
+> The example in [seg.c](x86/seg/seg.c) shows how to set the `gs` base
+> address and to relative accesses.
+
 ## References
 - [SystemV AMD64 ABI][sysvabi]
 - [AMD64 Vol1: Application Programming][amd64_vol1]
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