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| author | Johannes Stoelp <johannes.stoelp@gmail.com> | 2024-02-15 01:28:35 +0100 |
|---|---|---|
| committer | Johannes Stoelp <johannes.stoelp@gmail.com> | 2024-02-15 09:18:28 +0100 |
| commit | 181545b2cc783165b4387b0d9f31a177ae0af925 (patch) | |
| tree | e14c5c882f33a43f699b474742f06ff15b62b698 /roles/webserver | |
| parent | 14cd403da011bbb0b44c5d1b72da67c44755b3ce (diff) | |
| download | ansible-memzero-181545b2cc783165b4387b0d9f31a177ae0af925.tar.gz ansible-memzero-181545b2cc783165b4387b0d9f31a177ae0af925.zip | |
nginx: reformat home page
Diffstat (limited to 'roles/webserver')
| -rw-r--r-- | roles/webserver/files/www/memzero/index.html | 151 |
1 files changed, 74 insertions, 77 deletions
diff --git a/roles/webserver/files/www/memzero/index.html b/roles/webserver/files/www/memzero/index.html index 3588af7..a4864be 100644 --- a/roles/webserver/files/www/memzero/index.html +++ b/roles/webserver/files/www/memzero/index.html @@ -1,89 +1,86 @@ <!DOCTYPE html> <html lang="en"> - <head> - <meta charset="utf-8"> - <meta name="description" content="homepage of johannes stoelp (stölp)"> - <meta name="keywords" content="iss, dbt, systemc, simulation, vp, virtual prototyping, homepage, synopsys, stölp"> - <meta name="author" content="johannes stoelp"> - <meta name="viewport" content="width=device-width, initial-scale=1.0"> - <title>memzero</title> - <style> - html { - font-family: Source Code Pro, monospace, sans-serif; - font-size: clamp(12px, 2vw, 16px); - } - hr { - border: none; - border-top: 1px dashed; - } - body { - /* background-color: #2e303e; */ - /* color: #eeeeee; */ - margin: auto 2vw auto 2vw; - } - .formatted { - white-space: pre-wrap; - } - </style> + <meta charset="utf-8"> + <meta name="description" content="homepage of johannes stoelp (stölp)"> + <meta name="keywords" content="iss, dbt, systemc, simulation, vp, virtual prototyping, homepage, synopsys, stölp"> + <meta name="author" content="johannes stoelp"> + <meta name="viewport" content="width=device-width, initial-scale=1.0"> + <title>memzero</title> + <style> + html { + font-family: Source Code Pro, monospace, sans-serif; + font-size: clamp(12px, 2vw, 16px); + } + hr { + border: none; + border-top: 1px dashed; + } + body { + /* background-color: #2e303e; */ + /* color: #eeeeee; */ + margin: auto 2vw auto 2vw; + } + .formatted { + white-space: pre-wrap; + } + </style> </head> - <body> - <p>Hi .*, welcome to my little website.</p> - <p> - I am a research and development (RnD) engineer at <a href="https://www.synopsys.com">Synopsys</a>, - working on simulation technologies for <a href="https://www.synopsys.com/verification/virtual-prototyping.html">Virtual Prototyping</a> - and <a href="https://www.synopsys.com/verification/emulation/use-cases-fast-emulation.html">Hybrid Emulation</a>. - As a high level summary, in the past I have been working on processor - modelling, checkpoint/restore, early software bring-ups, co-simulation - adaptors for hybrid emulation and debugger integration. - </p> - <p>- Johannes Stoelp</p> - <hr> + <p>Hi .*, welcome to my little website.</p> + <p> + I am a research and development (RnD) engineer at <a href="https://www.synopsys.com">Synopsys</a>, + working on simulation technologies for <a href="https://www.synopsys.com/verification/virtual-prototyping.html">Virtual Prototyping</a> + and <a href="https://www.synopsys.com/verification/emulation/use-cases-fast-emulation.html">Hybrid Emulation</a>. + As a high level summary, in the past I have been working on processor + modelling, checkpoint/restore, early software bring-ups, co-simulation + adaptors for hybrid emulation and debugger integration. + </p> + <p>- Johannes Stoelp</p> + <hr> - <p>My professional and personal interests are in the following areas</p> - <ul> - <li>full-system simulation</li> - <li>instruction set simulators (iss)</li> - <li>binary translation</li> - <li>operating systems and hypervisors</li> - <li>computer architecture</li> - <li>processor microarchitecture (uarch)</li> - <li>software architecture</li> - <li>performance tuning</li> - <li>.. poking compilers and linkers :^)</li> - </ul> + <p>My professional and personal interests are in the following areas</p> + <ul> + <li>full-system simulation</li> + <li>instruction set simulators (iss)</li> + <li>binary translation</li> + <li>operating systems and hypervisors</li> + <li>computer architecture</li> + <li>processor microarchitecture (uarch)</li> + <li>software architecture</li> + <li>performance tuning</li> + <li>.. poking compilers and linkers :^)</li> + </ul> - <p>The languages I currently enjoy writing and reading the most are</p> - <ul> - <li>rust</li> - <li>cpp / template meta programming</li> - <li>asm</li> - <li>bash / fish script</li> - <li>python</li> - </ul> + <p>The languages I currently enjoy writing and reading the most are</p> + <ul> + <li>rust</li> + <li>cpp / template meta programming</li> + <li>asm</li> + <li>bash / fish script</li> + <li>python</li> + </ul> - <p>Find or reach me via</p> - <ul> - <li>johannes (at) memzero (dot) de [<a href="https://memzero.de/0814A6FA524257F7F10EDC36F62EBCE823AE9867.asc">key</a>]</li> - <li><a href="https://linkedin.com/in/johannst">linkedin</a> (requires login)</li> - <li>discord johannst#5801</li> - <li><a href="https://blog.memzero.de">blog</a></li> - <li><a href="https://github.com/johannst">github</a></li> - <li><a href="https://git.memzero.de">personal git</a></li> - <li><a href="https://twitter.com/xjohannst">twitter</a></li> - </ul> + <p>Find or reach me via</p> + <ul> + <li>johannes (at) memzero (dot) de [<a href="https://memzero.de/0814A6FA524257F7F10EDC36F62EBCE823AE9867.asc">key</a>]</li> + <li><a href="https://linkedin.com/in/johannst">linkedin</a> (requires login)</li> + <li>discord johannst#5801</li> + <li><a href="https://blog.memzero.de">blog</a></li> + <li><a href="https://github.com/johannst">github</a></li> + <li><a href="https://git.memzero.de">personal git</a></li> + <li><a href="https://twitter.com/xjohannst">twitter</a></li> + </ul> - <p>Education</p> - <ul> - <li>2017 | Dipl.-Ing. (MSc) in electrical engineering - <a href="https://www.eit.uni-kl.de/en">Technical University Kaiserslautern</a></li> - </ul> + <p>Education</p> + <ul> + <li>2017 | Dipl.-Ing. (MSc) in electrical engineering - <a href="https://www.eit.uni-kl.de/en">Technical University Kaiserslautern</a></li> + </ul> - <p>Professional experience</p> - <ul> - <li class="formatted">Jan 2017 - present | RnD Engineer at Synopsys</li> - <li class="formatted">Oct 2015 - Dec 2016 | Research Intern at Synopsys</li> - </ul> + <p>Professional experience</p> + <ul> + <li class="formatted">Jan 2017 - present | RnD Engineer at Synopsys</li> + <li class="formatted">Oct 2015 - Dec 2016 | Research Intern at Synopsys</li> + </ul> </body> - </html> |