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authorJohannes Stoelp <johannes.stoelp@gmail.com>2024-03-18 22:57:58 +0100
committerJohannes Stoelp <johannes.stoelp@gmail.com>2024-03-18 22:57:58 +0100
commitd65d1327459a5f3866c8803fb1d9fbdb2de96f75 (patch)
treeb5e37ee591106ced7c709440db42d1fe258bbfa7 /src/asm.rs
parentaee91960846cc5786b1ce0f87b107534440a8450 (diff)
downloadjuicebox-asm-d65d1327459a5f3866c8803fb1d9fbdb2de96f75.tar.gz
juicebox-asm-d65d1327459a5f3866c8803fb1d9fbdb2de96f75.zip
asm: preparation for cmovnz/cmovz
Diffstat (limited to 'src/asm.rs')
-rw-r--r--src/asm.rs5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/asm.rs b/src/asm.rs
index 8ee5fb1..010bb68 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -92,7 +92,7 @@ impl Asm {
// -- Encode utilities.
/// Encode an register-register instruction.
- pub(crate) fn encode_rr<T: Reg>(&mut self, opc: u8, op1: T, op2: T)
+ pub(crate) fn encode_rr<T: Reg>(&mut self, opc: &[u8], op1: T, op2: T)
where
Self: EncodeRR<T>,
{
@@ -109,7 +109,8 @@ impl Asm {
let rex = <Self as EncodeRR<T>>::rex(op1, op2);
self.emit_optional(&[prefix, rex]);
- self.emit(&[opc, modrm]);
+ self.emit(opc);
+ self.emit(&[modrm]);
}
/// Encode an offset-immediate instruction.