mem: make all memory operands explicit in size

* remove non size explicit MemOp
* introduce private Mem trait
* implement Mem8, Mem16, Mem32 and Mem64 operands
* implement EncodeX helpers based on explicit memory operands
* fixup instructions with explicit memory operands
* fixup examples

7 files changed, 84 insertions, 66 deletions

diff --git a/src/insn/add.rs b/src/insn/add.rs
index 1f5294e..9766b22 100644
--- a/src/insn/add.rs
+++ b/src/insn/add.rs
@@ -1,44 +1,62 @@
 use super::Add;
-use crate::{Asm, Imm16, Imm8, MemOp, Reg16, Reg32, Reg64};
+use crate::{Asm, Imm16, Imm8, Mem16, Mem32, Mem64, Mem8, Reg16, Reg32, Reg64};
 
-impl Add<Reg64, Reg64> for Asm {
-    fn add(&mut self, op1: Reg64, op2: Reg64) {
+impl Add<Reg32, Reg32> for Asm {
+    fn add(&mut self, op1: Reg32, op2: Reg32) {
         self.encode_rr(&[0x01], op1, op2);
     }
 }
 
-impl Add<Reg32, Reg32> for Asm {
-    fn add(&mut self, op1: Reg32, op2: Reg32) {
+impl Add<Reg64, Reg64> for Asm {
+    fn add(&mut self, op1: Reg64, op2: Reg64) {
         self.encode_rr(&[0x01], op1, op2);
     }
 }
 
-impl Add<MemOp, Reg64> for Asm {
-    fn add(&mut self, op1: MemOp, op2: Reg64) {
+impl Add<Mem16, Reg16> for Asm {
+    fn add(&mut self, op1: Mem16, op2: Reg16) {
         self.encode_mr(0x01, op1, op2);
     }
 }
 
-impl Add<MemOp, Reg16> for Asm {
-    fn add(&mut self, op1: MemOp, op2: Reg16) {
+impl Add<Mem64, Reg64> for Asm {
+    fn add(&mut self, op1: Mem64, op2: Reg64) {
         self.encode_mr(0x01, op1, op2);
     }
 }
 
-impl Add<MemOp, Imm8> for Asm {
-    fn add(&mut self, op1: MemOp, op2: Imm8) {
+impl Add<Reg64, Mem64> for Asm {
+    fn add(&mut self, op1: Reg64, op2: Mem64) {
+        self.encode_rm(0x03, op1, op2);
+    }
+}
+
+impl Add<Mem8, Imm8> for Asm {
+    fn add(&mut self, op1: Mem8, op2: Imm8) {
+        self.encode_mi(0x80, 0, op1, op2);
+    }
+}
+
+impl Add<Mem16, Imm8> for Asm {
+    fn add(&mut self, op1: Mem16, op2: Imm8) {
         self.encode_mi(0x83, 0, op1, op2);
     }
 }
 
-impl Add<MemOp, Imm16> for Asm {
-    fn add(&mut self, op1: MemOp, op2: Imm16) {
-        self.encode_mi(0x81, 0, op1, op2);
+impl Add<Mem32, Imm8> for Asm {
+    fn add(&mut self, op1: Mem32, op2: Imm8) {
+        self.encode_mi(0x83, 0, op1, op2);
     }
 }
 
-impl Add<Reg64, MemOp> for Asm {
-    fn add(&mut self, op1: Reg64, op2: MemOp) {
-        self.encode_rm(0x03, op1, op2);
+impl Add<Mem64, Imm8> for Asm {
+    fn add(&mut self, op1: Mem64, op2: Imm8) {
+        self.encode_mi(0x83, 0, op1, op2);
+    }
+}
+
+impl Add<Mem16, Imm16> for Asm {
+    fn add(&mut self, op1: Mem16, op2: Imm16) {
+        self.encode_mi(0x81, 0, op1, op2);
     }
 }
diff --git a/src/insn/cmp.rs b/src/insn/cmp.rs
index 95c513d..2d6f48b 100644
--- a/src/insn/cmp.rs
+++ b/src/insn/cmp.rs
@@ -1,14 +1,14 @@
 use super::Cmp;
-use crate::{Asm, Imm16, Imm8, MemOp};
+use crate::{Asm, Imm16, Imm8, Mem16, Mem8};
 
-impl Cmp<MemOp, Imm8> for Asm {
-    fn cmp(&mut self, op1: MemOp, op2: Imm8) {
+impl Cmp<Mem8, Imm8> for Asm {
+    fn cmp(&mut self, op1: Mem8, op2: Imm8) {
         self.encode_mi(0x80, 0x7, op1, op2);
     }
 }
 
-impl Cmp<MemOp, Imm16> for Asm {
-    fn cmp(&mut self, op1: MemOp, op2: Imm16) {
+impl Cmp<Mem16, Imm16> for Asm {
+    fn cmp(&mut self, op1: Mem16, op2: Imm16) {
         self.encode_mi(0x81, 0x7, op1, op2);
     }
 }
diff --git a/src/insn/dec.rs b/src/insn/dec.rs
index 66b83aa..545bc54 100644
--- a/src/insn/dec.rs
+++ b/src/insn/dec.rs
@@ -1,5 +1,5 @@
 use super::Dec;
-use crate::{Asm, MemOp16, MemOp32, MemOp64, MemOp8, Reg32, Reg64};
+use crate::{Asm, Mem16, Mem32, Mem64, Mem8, Reg32, Reg64};
 
 impl Dec<Reg64> for Asm {
     fn dec(&mut self, op1: Reg64) {
@@ -13,26 +13,26 @@ impl Dec<Reg32> for Asm {
     }
 }
 
-impl Dec<MemOp8> for Asm {
-    fn dec(&mut self, op1: MemOp8) {
+impl Dec<Mem8> for Asm {
+    fn dec(&mut self, op1: Mem8) {
         self.encode_m(0xfe, 1, op1);
     }
 }
 
-impl Dec<MemOp16> for Asm {
-    fn dec(&mut self, op1: MemOp16) {
+impl Dec<Mem16> for Asm {
+    fn dec(&mut self, op1: Mem16) {
         self.encode_m(0xff, 1, op1);
     }
 }
 
-impl Dec<MemOp32> for Asm {
-    fn dec(&mut self, op1: MemOp32) {
+impl Dec<Mem32> for Asm {
+    fn dec(&mut self, op1: Mem32) {
         self.encode_m(0xff, 1, op1);
     }
 }
 
-impl Dec<MemOp64> for Asm {
-    fn dec(&mut self, op1: MemOp64) {
+impl Dec<Mem64> for Asm {
+    fn dec(&mut self, op1: Mem64) {
         self.encode_m(0xff, 1, op1);
     }
 }
diff --git a/src/insn/inc.rs b/src/insn/inc.rs
index 1530d63..810fe3d 100644
--- a/src/insn/inc.rs
+++ b/src/insn/inc.rs
@@ -1,5 +1,5 @@
 use super::Inc;
-use crate::{Asm, MemOp16, MemOp32, MemOp64, MemOp8, Reg32, Reg64};
+use crate::{Asm, Mem16, Mem32, Mem64, Mem8, Reg32, Reg64};
 
 impl Inc<Reg64> for Asm {
     fn inc(&mut self, op1: Reg64) {
@@ -13,26 +13,26 @@ impl Inc<Reg32> for Asm {
     }
 }
 
-impl Inc<MemOp8> for Asm {
-    fn inc(&mut self, op1: MemOp8) {
+impl Inc<Mem8> for Asm {
+    fn inc(&mut self, op1: Mem8) {
         self.encode_m(0xfe, 0, op1);
     }
 }
 
-impl Inc<MemOp16> for Asm {
-    fn inc(&mut self, op1: MemOp16) {
+impl Inc<Mem16> for Asm {
+    fn inc(&mut self, op1: Mem16) {
         self.encode_m(0xff, 0, op1);
     }
 }
 
-impl Inc<MemOp32> for Asm {
-    fn inc(&mut self, op1: MemOp32) {
+impl Inc<Mem32> for Asm {
+    fn inc(&mut self, op1: Mem32) {
         self.encode_m(0xff, 0, op1);
     }
 }
 
-impl Inc<MemOp64> for Asm {
-    fn inc(&mut self, op1: MemOp64) {
+impl Inc<Mem64> for Asm {
+    fn inc(&mut self, op1: Mem64) {
         self.encode_m(0xff, 0, op1);
     }
 }
diff --git a/src/insn/mov.rs b/src/insn/mov.rs
index df45bd6..b9aef67 100644
--- a/src/insn/mov.rs
+++ b/src/insn/mov.rs
@@ -1,5 +1,5 @@
 use super::Mov;
-use crate::{Asm, Imm16, Imm32, Imm64, Imm8, MemOp, Reg16, Reg32, Reg64, Reg8};
+use crate::{Asm, Imm16, Imm32, Imm64, Imm8, Mem16, Mem32, Mem64, Mem8, Reg16, Reg32, Reg64, Reg8};
 
 // -- MOV : reg reg
 
@@ -29,52 +29,52 @@ impl Mov<Reg8, Reg8> for Asm {
 
 // -- MOV : mem reg
 
-impl Mov<MemOp, Reg64> for Asm {
-    fn mov(&mut self, op1: MemOp, op2: Reg64) {
+impl Mov<Mem64, Reg64> for Asm {
+    fn mov(&mut self, op1: Mem64, op2: Reg64) {
         self.encode_mr(0x89, op1, op2);
     }
 }
 
-impl Mov<MemOp, Reg32> for Asm {
-    fn mov(&mut self, op1: MemOp, op2: Reg32) {
+impl Mov<Mem32, Reg32> for Asm {
+    fn mov(&mut self, op1: Mem32, op2: Reg32) {
         self.encode_mr(0x89, op1, op2);
     }
 }
 
-impl Mov<MemOp, Reg16> for Asm {
-    fn mov(&mut self, op1: MemOp, op2: Reg16) {
+impl Mov<Mem16, Reg16> for Asm {
+    fn mov(&mut self, op1: Mem16, op2: Reg16) {
         self.encode_mr(0x89, op1, op2);
     }
 }
 
-impl Mov<MemOp, Reg8> for Asm {
-    fn mov(&mut self, op1: MemOp, op2: Reg8) {
+impl Mov<Mem8, Reg8> for Asm {
+    fn mov(&mut self, op1: Mem8, op2: Reg8) {
         self.encode_mr(0x88, op1, op2);
     }
 }
 
 // -- MOV : reg mem
 
-impl Mov<Reg64, MemOp> for Asm {
-    fn mov(&mut self, op1: Reg64, op2: MemOp) {
+impl Mov<Reg64, Mem64> for Asm {
+    fn mov(&mut self, op1: Reg64, op2: Mem64) {
         self.encode_rm(0x8b, op1, op2);
     }
 }
 
-impl Mov<Reg32, MemOp> for Asm {
-    fn mov(&mut self, op1: Reg32, op2: MemOp) {
+impl Mov<Reg32, Mem32> for Asm {
+    fn mov(&mut self, op1: Reg32, op2: Mem32) {
         self.encode_rm(0x8b, op1, op2);
     }
 }
 
-impl Mov<Reg16, MemOp> for Asm {
-    fn mov(&mut self, op1: Reg16, op2: MemOp) {
+impl Mov<Reg16, Mem16> for Asm {
+    fn mov(&mut self, op1: Reg16, op2: Mem16) {
         self.encode_rm(0x8b, op1, op2);
     }
 }
 
-impl Mov<Reg8, MemOp> for Asm {
-    fn mov(&mut self, op1: Reg8, op2: MemOp) {
+impl Mov<Reg8, Mem8> for Asm {
+    fn mov(&mut self, op1: Reg8, op2: Mem8) {
         self.encode_rm(0x8a, op1, op2);
     }
 }
@@ -107,8 +107,8 @@ impl Mov<Reg8, Imm8> for Asm {
 
 // -- MOV : mem imm
 
-impl Mov<MemOp, Imm16> for Asm {
-    fn mov(&mut self, op1: MemOp, op2: Imm16) {
+impl Mov<Mem16, Imm16> for Asm {
+    fn mov(&mut self, op1: Mem16, op2: Imm16) {
         self.encode_mi(0xc7, 0, op1, op2);
     }
 }
diff --git a/src/insn/sub.rs b/src/insn/sub.rs
index 814744c..d56daae 100644
--- a/src/insn/sub.rs
+++ b/src/insn/sub.rs
@@ -1,5 +1,5 @@
 use super::Sub;
-use crate::{Asm, Imm8, MemOp, Reg64};
+use crate::{Asm, Imm8, Mem8, Reg64};
 
 impl Sub<Reg64, Reg64> for Asm {
     fn sub(&mut self, op1: Reg64, op2: Reg64) {
@@ -7,8 +7,8 @@ impl Sub<Reg64, Reg64> for Asm {
     }
 }
 
-impl Sub<MemOp, Imm8> for Asm {
-    fn sub(&mut self, op1: MemOp, op2: Imm8) {
-        self.encode_mi(0x83, 5, op1, op2);
+impl Sub<Mem8, Imm8> for Asm {
+    fn sub(&mut self, op1: Mem8, op2: Imm8) {
+        self.encode_mi(0x80, 5, op1, op2);
     }
 }
diff --git a/src/insn/test.rs b/src/insn/test.rs
index 9bca200..2cf6d26 100644
--- a/src/insn/test.rs
+++ b/src/insn/test.rs
@@ -1,5 +1,5 @@
 use super::Test;
-use crate::{Asm, Imm16, MemOp, Reg32, Reg64};
+use crate::{Asm, Imm16, Mem16, Reg32, Reg64};
 
 impl Test<Reg64, Reg64> for Asm {
     fn test(&mut self, op1: Reg64, op2: Reg64) {
@@ -13,8 +13,8 @@ impl Test<Reg32, Reg32> for Asm {
     }
 }
 
-impl Test<MemOp, Imm16> for Asm {
-    fn test(&mut self, op1: MemOp, op2: Imm16) {
+impl Test<Mem16, Imm16> for Asm {
+    fn test(&mut self, op1: Mem16, op2: Imm16) {
         self.encode_mi(0xf7, 0, op1, op2);
     }
 }