Add ADD, DEC, TEST, RET instructions

4 files changed, 28 insertions, 0 deletions

diff --git a/src/insn/add.rs b/src/insn/add.rs
new file mode 100644
index 0000000..b8456c4
--- /dev/null
+++ b/src/insn/add.rs
@@ -0,0 +1,7 @@
+use crate::prelude::*;
+
+impl Add<Reg64, Reg64> for Asm {
+    fn add(&mut self, op1: Reg64, op2: Reg64) {
+        self.encode_rr(0x01, op1, op2);
+    }
+}
diff --git a/src/insn/dec.rs b/src/insn/dec.rs
new file mode 100644
index 0000000..7de5a54
--- /dev/null
+++ b/src/insn/dec.rs
@@ -0,0 +1,7 @@
+use crate::prelude::*;
+
+impl Dec<Reg64> for Asm {
+    fn dec(&mut self, op1: Reg64) {
+        self.encode_r(0xff, 1, op1);
+    }
+}
diff --git a/src/insn/ret.rs b/src/insn/ret.rs
new file mode 100644
index 0000000..74086d8
--- /dev/null
+++ b/src/insn/ret.rs
@@ -0,0 +1,7 @@
+use crate::Asm;
+
+impl Asm {
+    pub fn ret(&mut self) {
+        self.emit(&[0xc3]);
+    }
+}
diff --git a/src/insn/test.rs b/src/insn/test.rs
new file mode 100644
index 0000000..1319e3f
--- /dev/null
+++ b/src/insn/test.rs
@@ -0,0 +1,7 @@
+use crate::prelude::*;
+
+impl Test<Reg64, Reg64> for Asm {
+    fn test(&mut self, op1: Reg64, op2: Reg64) {
+        self.encode_rr(0x85, op1, op2);
+    }
+}