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| author | Johannes Stoelp <johannes.stoelp@gmail.com> | 2022-04-30 19:44:06 +0200 |
|---|---|---|
| committer | Johannes Stoelp <johannes.stoelp@gmail.com> | 2022-04-30 19:44:06 +0200 |
| commit | b06d773f1f41aaa68afc0fe49e04d4d31c53fce1 (patch) | |
| tree | 02159c74d11b937d14034ae1c42c8c9c19d16f7d /lib/arch/riscv64 | |
| parent | 41e25701689a8d77190b2d8f890508b9c4f30c10 (diff) | |
| download | matcha-threads-b06d773f1f41aaa68afc0fe49e04d4d31c53fce1.tar.gz matcha-threads-b06d773f1f41aaa68afc0fe49e04d4d31c53fce1.zip | |
Diffstat (limited to 'lib/arch/riscv64')
| -rw-r--r-- | lib/arch/riscv64/README.md | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/arch/riscv64/README.md b/lib/arch/riscv64/README.md index 1287f76..1221d9e 100644 --- a/lib/arch/riscv64/README.md +++ b/lib/arch/riscv64/README.md @@ -8,5 +8,6 @@ Provide an implementation of the platform specific API as required in - Callee saved registers `x2`, `x8` - `x9`, `x18` - `x27`, `f8` - `f9`, `f18` - `f27` ## References +- [johannst riscv notes](https://johannst.github.io/notes/arch/riscv.html) - [RISC-V ABI](https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md) - [RISC-V asm manual](https://github.com/riscv/riscv-asm-manual/blob/master/riscv-asm.md) |