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author | johannst <johannes.stoelp@gmail.com> | 2021-02-28 21:36:15 +0100 |
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committer | johannst <johannes.stoelp@gmail.com> | 2021-02-28 21:36:15 +0100 |
commit | 548d3291eefc5150778f9f532fe95374155fd822 (patch) | |
tree | b245987ada6f82127ccc64dd80814e4e83628fc9 /src/arch | |
parent | 71a0eed41758e017a4e856c8d9101f4b59f81f9b (diff) | |
download | notes-548d3291eefc5150778f9f532fe95374155fd822.tar.gz notes-548d3291eefc5150778f9f532fe95374155fd822.zip |
armv7 added load/store notes
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/armv7.md | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/src/arch/armv7.md b/src/arch/armv7.md index 5f4980e..f6c3a96 100644 --- a/src/arch/armv7.md +++ b/src/arch/armv7.md @@ -68,6 +68,32 @@ blx <Rm> // absolute branch to address in register Rm & // link return addr in r14 (LR) ``` +### Load/Store +Different addressing modes. +```armasm +str r1, [r0] // [r0]=r1 +str r1, [r0, #4] // [r0+4]=r1 +str r1, [r0, #4]! // r0+=4; [r0]=r1 +str r1, [r0], 4 // [r0]=r1; r0+=4 +``` + +Load/store multiple registers full-descending. +```armasm +stmfd r0!, {r1-r2, r5} // r0-=4; [r0]=r5 + // r0-=4; [r0]=r2 + // r0-=4; [r0]=r1 +ldmfd r0!, {r1-r2, r5} // r1=[r0]; r0+=4 + // r2=[r0]; r0+=4 + // r5=[r0]; r0+=4 +``` +> `!` is optional but has the effect to update the base pointer register `r0` here. + +Push/Pop +```armasm +push {r0-r2} // effectively stmfd sp!, {r0-r2} +pop {r0-r2} // effectively ldmfd sp!, {r0-r2} +``` + ## Procedure Call Standard ARM ([`aapcs32`][aapcs32]) ### Passing arguments to functions - integer/pointer arguments |