added x86_64 notes

3 files changed, 163 insertions, 0 deletions

diff --git a/src/SUMMARY.md b/src/SUMMARY.md
index f462e0d..de39c2d 100644
--- a/src/SUMMARY.md
+++ b/src/SUMMARY.md
@@ -38,3 +38,6 @@
     - [glibc](./development/glibc.md)
     - [gcc](./development/gcc.md)
     - [ld.so](./development/ld.so.md)
+
+- [Arch](./arch/README.md)
+    - [x86_64](./arch/x86_64.md)
diff --git a/src/arch/README.md b/src/arch/README.md
new file mode 100644
index 0000000..db3ef8f
--- /dev/null
+++ b/src/arch/README.md
@@ -0,0 +1 @@
+# Arch
diff --git a/src/arch/x86_64.md b/src/arch/x86_64.md
new file mode 100644
index 0000000..85ef57a
--- /dev/null
+++ b/src/arch/x86_64.md
@@ -0,0 +1,159 @@
+# x86_64
+
+Synonyms: `x86_64`, `x64`, `amd64`
+
+## Registers
+### General purpose register
+```markdown
+bytes
+[7:0]      [3:0]   [1:0]   [1]   [0]     desc
+----------------------------------------------------------
+rax        eax     ax      ah    al      accumulator
+rbx        ebx     bx      bh    bl      base register
+rcx        ecx     cx      ch    cl      counter
+rdx        edx     dx      dh    dl      data register
+rsi        esi     si      -     sil     source index
+rdi        edi     di      -     dil     destination index
+rbp        ebp     bp      -     bpl     base pointer
+rsp        esp     sp      -     spl     stack pointer
+r8...r15   rNd     rNw     -     rNb
+```
+
+### Special register
+```markdown
+bytes
+[7:0]      [3:0]     [1:0]      desc
+---------------------------------------------------
+rflags     eflags    flags      flags register
+rip        eip       ip         instruction pointer
+```
+
+### FLAGS register
+
+```markdown
+rflags
+bits  desc
+-----------------------------
+[11]  OF overflow flag
+[10]  DF direction flag
+ [7]  SF sign flag
+ [6]  ZF zero flag
+ [4]  AF auxiliary carry flag
+ [2]  PF parity flag
+ [0]  CF carry flag
+```
+
+## Addressing
+```asm
+movw [rax], rbx         // save val in rbx at [rax]
+movw [imm], rbx         // save val in rbx at [imm]
+movw rax, [rbx+4*rcx]   // load val at [rbx+4*rcx] into rax
+```
+
+`rip` relative addressing:
+```asm
+lea rax, [rip+.my_str]       // load addr of .my_str into rax
+...
+.my_str:
+.asciz "Foo"
+```
+
+## Size directives
+Explicitly specify size of the operation.
+
+```nasm
+mov  byte ptr [rax], 0xff    // save 1 byte(s) at [rax]
+mov  word ptr [rax], 0xff    // save 2 byte(s) at [rax]
+mov dword ptr [rax], 0xff    // save 4 byte(s) at [rax]
+mov qword ptr [rax], 0xff    // save 8 byte(s) at [rax]
+```
+
+## [SysV AMD64 ABI][sysvabi]
+
+### Passing arguments to functions
+- Integer/Pointer arguments
+  ```markdown
+  reg     arg
+  -----------
+  rdi       1
+  rsi       2
+  rdx       3
+  rcx       4
+  r8        5
+  r9        6
+  ```
+- Floating point arguments
+  ```markdown
+  reg     arg
+  -----------
+  xmm0      1
+    ..     ..
+  xmm7      7
+  ```
+- Additional arguments are passed on the stack (RTL right-to-left)
+
+### Return values from functions
+- Integer/Pointer return values
+  ```markdown
+  reg          size
+  -----------------
+  rax        64 bit
+  rax+rdx   128 bit
+  ```
+- Floating point return values:
+  ```markdown
+  reg            size
+  -------------------
+  xmm0         64 bit
+  xmm0+xmm1   128 bit
+  ```
+
+### Caller saved registers
+Caller must save these registers if they should be preserved across function
+calls.
+- `rax`
+- `rcx`
+- `rdx`
+- `rsi`
+- `rdi`
+- `rsp`
+- `r8` - `r11`
+
+### Callee saved registers
+Caller can expect these registers to be preserved across function calls. Callee
+must must save these registers in case they are used.
+- `rbx`
+- `rbp`
+- `r12` – `r15`
+
+### Stack
+- grows downwards
+- frames aligned on 16 byte boundary
+  ```text
+  HI ADDR
+   |                +------------+
+   |                | prev frame |
+   |                +------------+ <--- 16 byte aligned (X & ~0xf)
+   |       [rbp+8]  | saved RIP  |
+   |       [rbp]    | saved RBP  |
+   |       [rbp-8]  | func stack |
+   |                | ...        |
+   v                +------------+
+  LO ADDR
+  ```
+
+## References
+- [SystemV AMD64 abi][sysvabi]
+- [AMD64 Vol1: Application Programming][amd64_vol1]
+- [AMD64 Vol2: System Programming][amd64_vol2]
+- [AMD64 Vol3: General-Purpose & System Instructions][amd64_vol3]
+- [X86_64 Cheat-Sheet][x86_64_cheat]
+
+
+[sysvabi]: https://www.uclibc.org/docs/psABI-x86_64.pdf
+[amd64_vol1]: https://www.amd.com/system/files/TechDocs/24592.pdf
+[amd64_vol2]: https://www.amd.com/system/files/TechDocs/24593.pdf
+[amd64_vol3]: https://www.amd.com/system/files/TechDocs/24594.pdf
+[x86_64_cheatsheet]: https://cs.brown.edu/courses/cs033/docs/guides/x64_cheatsheet.pdf
+[gas_directives]: https://sourceware.org/binutils/docs/as/Pseudo-Ops.html#Pseudo-Ops
+