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<h1><a class="header" href="#arm64" id="arm64">arm64</a></h1>
<p>keywords: arm64, aarch64, abi</p>
<ul>
<li>64bit synonyms: <code>arm64</code>, <code>aarch64</code></li>
<li>ISA type: <code>RISC</code></li>
<li>Endianness: <code>little</code>, <code>big</code></li>
</ul>
<h2><a class="header" href="#registers" id="registers">Registers</a></h2>
<h3><a class="header" href="#general-purpose-registers" id="general-purpose-registers">General purpose registers</a></h3>
<pre><code class="language-markdown">bytes
[7:0] [3:0] desc
---------------------------------------------
x0-x28 w0-w28 general purpose registers
x29 w29 frame pointer (FP)
x30 w30 link register (LR)
sp wsp stack pointer (SP)
pc program counter (PC)
xzr wzr zero register
</code></pre>
<blockquote>
<p>Write to <code>wN</code> register clears upper 32bit.</p>
</blockquote>
<h3><a class="header" href="#special-registers-per-el" id="special-registers-per-el">Special registers per EL</a></h3>
<pre><code class="language-markdown">bytes
[7:0] desc
---------------------------------------------
sp_el0 stack pointer EL0
sp_el1 stack pointer EL1
elr_el1 exception link register EL1
spsr_el1 saved process status register EL1
sp_el2 stack pointer EL2
elr_el2 exception link register EL2
spsr_el2 saved process status register EL2
sp_el3 stack pointer EL3
elr_el3 exception link register EL3
spsr_el3 saved process status register EL3
</code></pre>
<h2><a class="header" href="#instructions-cheatsheet" id="instructions-cheatsheet">Instructions cheatsheet</a></h2>
<h3><a class="header" href="#accessing-system-registers" id="accessing-system-registers">Accessing system registers</a></h3>
<p>Reading from system registers:</p>
<pre><code class="language-armasm">mrs x0, vbar_el1 // move vbar_el1 into x0
</code></pre>
<p>Writing to system registers:</p>
<pre><code class="language-armasm">msr vbar_el1, x0 // move x0 into vbar_el1
</code></pre>
<h3><a class="header" href="#control-flow" id="control-flow">Control Flow</a></h3>
<pre><code class="language-armasm">b <offset> // relative forward/back branch
br <Xn> // absolute branch to address in register Xn
// branch & link, store return address in X30 (LR)
bl <offset> // relative forward/back branch
blr <Xn> // absolute branch to address in register Xn
ret {Xn} // return to address in X30, or Xn if supplied
</code></pre>
<h2><a class="header" href="#addressing" id="addressing">Addressing</a></h2>
<h3><a class="header" href="#offset" id="offset">Offset</a></h3>
<pre><code class="language-armasm">ldr x0, [x1] // x0 = [x1]
ldr x0, [x1, 8] // x0 = [x1 + 8]
ldr x0, [x1, x2, lsl #3] // x0 = [x1 + (x2<<3)]
ldr x0, [x1, w2, stxw] // x0 = [x1 + sign_ext(w2)]
ldr x0, [x1, w2, stxw #3] // x0 = [x1 + (sign_ext(w2)<<3)]
</code></pre>
<blockquote>
<p>Shift amount can either be <code>0</code> or <code>log2(access_size_bytes)</code>. Eg for 8byte
access it can either be <code>{0, 3}</code>.</p>
</blockquote>
<h3><a class="header" href="#index" id="index">Index</a></h3>
<pre><code class="language-armasm">ldr x0, [x1, 8]! // pre-inc : x1+=8; x0 = [x1]
ldr x0, [x1], 8 // post-inc: x0 = [x1]; x1+=8
</code></pre>
<h3><a class="header" href="#pair-access" id="pair-access">Pair access</a></h3>
<pre><code class="language-armasm">ldp x1, x2, [x0] // x1 = [x0]; x2 = [x0 + 8]
stp x1, x2, [x0] // [x0] = x1; [x0 + 8] = x2
</code></pre>
<h2><a class="header" href="#procedure-call-standard-arm64-a-hrefhttpsgithubcomarm-softwareabi-aablobmasteraapcs64aapcs64rstaapcs64a" id="procedure-call-standard-arm64-a-hrefhttpsgithubcomarm-softwareabi-aablobmasteraapcs64aapcs64rstaapcs64a">Procedure Call Standard ARM64 (<a href="https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst"><code>aapcs64</code></a>)</a></h2>
<h3><a class="header" href="#passing-arguments-to-functions" id="passing-arguments-to-functions">Passing arguments to functions</a></h3>
<ul>
<li>Integer/Pointer arguments
<pre><code class="language-markdown">reg arg
-----------
x0 1
.. ..
x7 8
</code></pre>
</li>
<li>Additional arguments are passed on the stack. Arguments are pushed
<code>right-to-left (RTL)</code>, meaning next arguments are closer to current <code>sp</code>.
<pre><code class="language-markdown">void take(..., int a9, int a10);
| | | ... | Hi
| +-->| a10 | |
+---------->| a9 | <-SP |
+-----+ v
| ... | Lo
</code></pre>
</li>
</ul>
<h3><a class="header" href="#return-values-from-functions" id="return-values-from-functions">Return values from functions</a></h3>
<ul>
<li>Integer/Pointer return values
<pre><code class="language-markdown">reg size
-----------------
x0 64 bit
</code></pre>
</li>
</ul>
<h3><a class="header" href="#callee-saved-registers" id="callee-saved-registers">Callee saved registers</a></h3>
<ul>
<li><code>x19</code> - <code>x28</code></li>
<li><code>SP</code></li>
</ul>
<h3><a class="header" href="#stack" id="stack">Stack</a></h3>
<ul>
<li>full descending
<ul>
<li>full: <code>sp</code> points to the last used location (valid item)</li>
<li>descending: stack grows downwards</li>
</ul>
</li>
<li><code>sp</code> must be 16byte aligned when used to access memory for r/w</li>
<li><code>sp</code> must be 16byte aligned on public interface interfaces</li>
</ul>
<h3><a class="header" href="#frame-chain" id="frame-chain">Frame chain</a></h3>
<ul>
<li>linked list of stack-frames</li>
<li>each frame links to the frame of its caller by a <code>frame record</code>
<ul>
<li>a frame record is described as a <code>(FP,LR)</code> pair</li>
</ul>
</li>
<li><code>x29 (FP)</code> must point to the frame record of the current stack-frame
<pre><code class="language-markdown"> +------+ Hi
| 0 | frame0 |
+->| 0 | |
| | ... | |
| +------+ |
| | LR | frame1 |
+--| FP |<-+ |
| ... | | |
+------+ | |
| LR | | current |
x29 ->| FP |--+ frame v
| ... | Lo
</code></pre>
</li>
<li>end of the frame chain is indicated by following frame record <code>(0,-)</code></li>
<li>location of the frame record in the stack frame is not specified</li>
</ul>
<h3><a class="header" href="#function-prologue--epilogue" id="function-prologue--epilogue">Function prologue & epilogue</a></h3>
<ul>
<li>prologue
<pre><code class="language-armasm">sub sp, sp, 16
stp x29, x30, [sp] // [sp] = x29; [sp + 8] = x30
mov x29, sp // FP points to frame record
</code></pre>
</li>
<li>epilogue
<pre><code class="language-armasm">ldp x29, x30, [sp] // x29 = [sp]; x30 = [sp + 8]
add sp, sp, 16
ret
</code></pre>
</li>
</ul>
<h2><a class="header" href="#asm-skeleton" id="asm-skeleton">ASM skeleton</a></h2>
<p>Small assembler skeleton, ready to use with following properties:</p>
<ul>
<li>use raw Linux syscalls (<code>man 2 syscall</code> for ABI)</li>
<li>no <code>C runtime (crt)</code></li>
<li>gnu assembler <a href="https://sourceware.org/binutils/docs/as"><code>gas</code></a></li>
</ul>
<pre><code class="language-armasm">// file: greet.S
#include <asm/unistd.h> // syscall NRs
.arch armv8-a
.section .text, "ax", @progbits
.balign 4 // align code on 4byte boundary
.global _start
_start:
mov x0, 2 // fd
ldr x1, =greeting // buf
ldr x2, =greeting_len // &len
ldr x2, [x2] // len
mov w8, __NR_write // write(2) syscall
svc 0
mov x0, 0 // exit code
mov w8, __NR_exit // exit(2) syscall
svc 0
.balign 8 // align data on 8byte boundary
.section .rodata, "a", @progbits
greeting:
.asciz "Hi ASM-World!\n"
greeting_len:
.int .-greeting
</code></pre>
<blockquote>
<p>man gcc: <code>file.S</code> assembler code that must be preprocessed.</p>
</blockquote>
<p>To cross-compile and run:</p>
<pre><code class="language-bash">> aarch64-linux-gnu-g++ -o greet greet.S -nostartfiles -nostdlib \
-Wl,--dynamic-linker=/usr/aarch64-linux-gnu/lib/ld-linux-aarch64.so.1 \
&& qemu-aarch64 ./greet
Hi ASM-World!
</code></pre>
<blockquote>
<p>Cross-compiling on <code>Ubuntu 20.04 (x86_64)</code>, paths might differ on other
distributions. Explicitly specifying the dynamic linker should not be
required when compiling natively on arm64.</p>
</blockquote>
<h2><a class="header" href="#references" id="references">References</a></h2>
<ul>
<li><a href="https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst">Procedure Call Standard ARM64</a></li>
<li><a href="https://developer.arm.com/documentation/den0024/latest">ARMv8-A Programmer's Guide</a></li>
<li><a href="https://developer.arm.com/documentation/ddi0487/latest">ARMv8-A Architecture Reference Manual</a></li>
<li><a href="https://developer.arm.com/documentation/dai0527/latest">AppNote: ARMv8 Bare-metal boot code</a></li>
<li><a href="https://sourceware.org/binutils/docs/as">GNU Assembler</a></li>
<li><a href="https://sourceware.org/binutils/docs/as/Pseudo-Ops.html#Pseudo-Ops">GNU Assembler Directives</a></li>
<li><a href="https://sourceware.org/binutils/docs/as/AArch64_002dDependent.html">GNU Assembler <code>AArch64</code> dependent features</a></li>
</ul>
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