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author | Johannes Stoelp <johannes.stoelp@gmail.com> | 2024-12-06 22:17:01 +0100 |
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committer | Johannes Stoelp <johannes.stoelp@gmail.com> | 2024-12-06 22:17:01 +0100 |
commit | 36345d8ab93d23d9f94372863e3747a07222b6ce (patch) | |
tree | 9391cfc2149c74d82a551977fed9c8efcb565561 /src/lib.rs | |
parent | 7653ced7e8ce18b9ada2b666c63832007f8becf2 (diff) | |
download | juicebox-asm-36345d8ab93d23d9f94372863e3747a07222b6ce.tar.gz juicebox-asm-36345d8ab93d23d9f94372863e3747a07222b6ce.zip |
asm: add inc, xor insn and initial support for memory base+idx
Diffstat (limited to 'src/lib.rs')
-rw-r--r-- | src/lib.rs | 18 |
1 files changed, 18 insertions, 0 deletions
@@ -94,6 +94,9 @@ pub enum MemOp { /// An indirect memory operand with additional displacement, eg `mov [rax + 0x10], rcx`. IndirectDisp(Reg64, i32), + + /// An indirect memory operand in the form base + index, eg `mov [rax + rcx], rdx`. + IndirectBaseIndex(Reg64, Reg64), } impl MemOp { @@ -102,6 +105,21 @@ impl MemOp { match self { MemOp::Indirect(base) => *base, MemOp::IndirectDisp(base, ..) => *base, + MemOp::IndirectBaseIndex(base, ..) => *base, + } + } + + /// Get the index register of the memory operand. + fn index(&self) -> Reg64 { + // Return zero index register for memory operands w/o index register. + let zero_index = Reg64::rax; + use reg::Reg; + assert_eq!(zero_index.idx(), 0); + + match self { + MemOp::Indirect(..) => zero_index, + MemOp::IndirectDisp(..) => zero_index, + MemOp::IndirectBaseIndex(.., index) => *index, } } } |