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| author | johannst <johannes.stoelp@gmail.com> | 2021-06-09 23:05:05 +0200 |
|---|---|---|
| committer | johannst <johannes.stoelp@gmail.com> | 2021-06-09 23:05:05 +0200 |
| commit | 2e4a31287705d8437cddd109c12b7e11825192bc (patch) | |
| tree | 448157595deb0b6441abebff45990dc9bd3558e6 /lib/arch/riscv64/README.md | |
| parent | 0db708a285c74526ebcce31a10f5730f3f715d61 (diff) | |
| download | matcha-threads-2e4a31287705d8437cddd109c12b7e11825192bc.tar.gz matcha-threads-2e4a31287705d8437cddd109c12b7e11825192bc.zip | |
added riscv64
Diffstat (limited to 'lib/arch/riscv64/README.md')
| -rw-r--r-- | lib/arch/riscv64/README.md | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/lib/arch/riscv64/README.md b/lib/arch/riscv64/README.md new file mode 100644 index 0000000..517ddb2 --- /dev/null +++ b/lib/arch/riscv64/README.md @@ -0,0 +1,12 @@ +# riscv64 (RISC-V ELF) +Provide an implementation of the platform specific API as required in +[`api.h`](../api.h) according to the `RISC-V ELF ABI`. + +## Notes: RISC-V ABI +- Integer/pointer arguments via `x10 - x17` +- Integer/pointer return values via `x10` - `x11` +- Callee saved registers `x2`, `x8` - `x9`, `x18` - `x27`, `f8` - `f9`, `f18` - `f27` + +## References +- [RISC-V ABI](https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md) +- [RISC-V asm manual](https://github.com/riscv/riscv-asm-manual/blob/master/riscv-asm.md) |