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| author | Johannes Stoelp <johannes.stoelp@gmail.com> | 2025-03-14 01:07:06 +0100 |
|---|---|---|
| committer | Johannes Stoelp <johannes.stoelp@gmail.com> | 2025-03-14 01:07:06 +0100 |
| commit | d45fbd7b57db7aaad55bdac0a28b47cec33d3c86 (patch) | |
| tree | 7c47bb6ba68402c2278d5b51472d1935a84edc6c /src/arch/x86_64.md | |
| parent | b534253a32b89136b486fbe1b15f645f549b89df (diff) | |
| download | notes-d45fbd7b57db7aaad55bdac0a28b47cec33d3c86.tar.gz notes-d45fbd7b57db7aaad55bdac0a28b47cec33d3c86.zip | |
x86: gs user-space example
Diffstat (limited to 'src/arch/x86_64.md')
| -rw-r--r-- | src/arch/x86_64.md | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/arch/x86_64.md b/src/arch/x86_64.md index 0ca18cc..575870f 100644 --- a/src/arch/x86_64.md +++ b/src/arch/x86_64.md @@ -422,6 +422,15 @@ itself. [15:0] Length of GDT table. ``` +> In 64-bit mode the `{cs, ds, es, ss}` segment register have no +> effect, segmentation is effectively disabled. The `{gs, fs}` segment +> register however can still be used for segmented memory access in +> 64-bit with paging enabled. Segmentation takes place before VA -> PA +> address translation. +> +> The example in [seg.c](x86/seg/seg.c) shows how to set the `gs` base +> address and to relative accesses. + ## References - [SystemV AMD64 ABI][sysvabi] - [AMD64 Vol1: Application Programming][amd64_vol1] |