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author | Johannes Stoelp <johannes.stoelp@gmail.com> | 2023-02-27 20:40:26 +0100 |
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committer | Johannes Stoelp <johannes.stoelp@gmail.com> | 2023-02-27 20:40:26 +0100 |
commit | 3e184b0b47d203cd37089296e0c49c9219c83b26 (patch) | |
tree | 9d9891bbded55165c24f597ce082f59f9743d22f /src/lib.rs | |
parent | 7c080806361e23e2e2a528fb391d6bf9c15404f0 (diff) | |
download | juicebox-asm-3e184b0b47d203cd37089296e0c49c9219c83b26.tar.gz juicebox-asm-3e184b0b47d203cd37089296e0c49c9219c83b26.zip |
Move instruction implementation in sub module and introduce insn prelude
Diffstat (limited to 'src/lib.rs')
-rw-r--r-- | src/lib.rs | 110 |
1 files changed, 2 insertions, 108 deletions
@@ -106,7 +106,7 @@ impl Asm { self.emit_optional(&[prefix, rex]); self.emit(&[opc]); - self.emit(&op2.bytes()); + self.emit(op2.bytes()); } fn encode_ri<T: Reg, U: Imm>(&mut self, opc: u8, opc_ext: u8, op1: T, op2: U) @@ -127,7 +127,7 @@ impl Asm { self.emit_optional(&[prefix, rex]); self.emit(&[opc, modrm]); - self.emit(&op2.bytes()); + self.emit(op2.bytes()); } fn encode_mr<T: Reg>(&mut self, opc: u8, op1: MemOp, op2: T) @@ -244,109 +244,3 @@ impl EncodeMR<Reg16> for Asm { } impl EncodeMR<Reg32> for Asm {} impl EncodeMR<Reg64> for Asm {} - -// -- Instruction implementations. - -// -- MOV : reg reg - -impl Mov<Reg64, Reg64> for Asm { - fn mov(&mut self, op1: Reg64, op2: Reg64) { - self.encode_rr(0x89, op1, op2); - } -} - -impl Mov<Reg32, Reg32> for Asm { - fn mov(&mut self, op1: Reg32, op2: Reg32) { - self.encode_rr(0x89, op1, op2); - } -} - -impl Mov<Reg16, Reg16> for Asm { - fn mov(&mut self, op1: Reg16, op2: Reg16) { - self.encode_rr(0x89, op1, op2); - } -} - -impl Mov<Reg8, Reg8> for Asm { - fn mov(&mut self, op1: Reg8, op2: Reg8) { - self.encode_rr(0x88, op1, op2); - } -} - -// -- MOV : mem reg - -impl Mov<MemOp, Reg64> for Asm { - fn mov(&mut self, op1: MemOp, op2: Reg64) { - self.encode_mr(0x89, op1, op2); - } -} - -impl Mov<MemOp, Reg32> for Asm { - fn mov(&mut self, op1: MemOp, op2: Reg32) { - self.encode_mr(0x89, op1, op2); - } -} - -impl Mov<MemOp, Reg16> for Asm { - fn mov(&mut self, op1: MemOp, op2: Reg16) { - self.encode_mr(0x89, op1, op2); - } -} - -impl Mov<MemOp, Reg8> for Asm { - fn mov(&mut self, op1: MemOp, op2: Reg8) { - self.encode_mr(0x88, op1, op2); - } -} - -// -- MOV : reg mem - -impl Mov<Reg64, MemOp> for Asm { - fn mov(&mut self, op1: Reg64, op2: MemOp) { - self.encode_rm(0x8b, op1, op2); - } -} - -impl Mov<Reg32, MemOp> for Asm { - fn mov(&mut self, op1: Reg32, op2: MemOp) { - self.encode_rm(0x8b, op1, op2); - } -} - -impl Mov<Reg16, MemOp> for Asm { - fn mov(&mut self, op1: Reg16, op2: MemOp) { - self.encode_rm(0x8b, op1, op2); - } -} - -impl Mov<Reg8, MemOp> for Asm { - fn mov(&mut self, op1: Reg8, op2: MemOp) { - self.encode_rm(0x8a, op1, op2); - } -} - -// -- MOV : reg imm - -impl Mov<Reg64, Imm64> for Asm { - fn mov(&mut self, op1: Reg64, op2: Imm64) { - self.encode_oi(0xb8, op1, op2); - } -} - -impl Mov<Reg32, Imm32> for Asm { - fn mov(&mut self, op1: Reg32, op2: Imm32) { - self.encode_oi(0xb8, op1, op2); - } -} - -impl Mov<Reg16, Imm16> for Asm { - fn mov(&mut self, op1: Reg16, op2: Imm16) { - self.encode_oi(0xb8, op1, op2); - } -} - -impl Mov<Reg8, Imm8> for Asm { - fn mov(&mut self, op1: Reg8, op2: Imm8) { - self.encode_oi(0xb0, op1, op2); - } -} |